diff mbox series

[v1,23/33] baseband/acc100: update log messages

Message ID	20220816055258.107564-24-hernan.vargas@intel.com (mailing list archive)
State	Superseded, archived
Delegated to:	akhil goyal
Headers	From: Hernan Vargas <hernan.vargas@intel.com> To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas <hernan.vargas@intel.com> Subject: [PATCH v1 23/33] baseband/acc100: update log messages Date: Mon, 15 Aug 2022 22:52:48 -0700 Message-Id: <20220816055258.107564-24-hernan.vargas@intel.com> In-Reply-To: <20220816055258.107564-1-hernan.vargas@intel.com> References: <20220816055258.107564-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: dev-bounces@dpdk.org
Series	baseband/acc100: changes for 22.11 \| [v1,00/33] baseband/acc100: changes for 22.11 [v1,01/33] baseband/acc100: update dev close function [v1,02/33] baseband/acc100: quit queue setup for undef dev [v1,03/33] baseband/acc100: add default e value for FCW [v1,04/33] baseband/acc100: add LDPC encoder padding function [v1,05/33] baseband/acc100: add scatter-gather support [v1,06/33] baseband/acc100: add HARQ index helper function [v1,07/33] baseband/acc100: avoid mux for small inbound frames [v1,08/33] baseband/acc100: separate validation functions from debug [v1,09/33] baseband/acc100: add LDPC transport block support [v1,10/33] baseband/acc10x: limit cases for HARQ pruning [v1,11/33] baseband/acc100: update validate LDPC enc/dec [v1,12/33] baseband/acc100: add workaround for deRM corner cases [v1,13/33] baseband/acc100: enable vf2pf doorbell register [v1,14/33] baseband/acc100: add ring companion address [v1,15/33] baseband/acc100: configure PMON control registers [v1,16/33] baseband/acc100: configurable queue depth [v1,17/33] baseband/acc100: add queue stop operation [v1,18/33] basbeband/acc100: check turbo dec/enc input [v1,19/33] baseband/acc100: check for unlikely operation vals [v1,20/33] baseband/acc100: enforce additional check on FCW [v1,21/33] baseband/acc100: update uplink CB input length [v1,22/33] baseband/acc100: rename ldpc encode function arg [v1,23/33] baseband/acc100: update log messages [v1,24/33] baseband/acc100: allocate ring/queue mem when NULL [v1,25/33] baseband/acc100: store FCW from first CB descriptor [v1,26/33] baseband/acc100: remove input error check from enc [v1,27/33] baseband/acc100: make desc optimization optional [v1,28/33] baseband/acc100: update device info [v1,29/33] baseband/acc100: reduce input length for CRC24B [v1,30/33] baseband/acc100: initialize ring data value [v1,31/33] baseband/acc100: update debug print for LDPC FCW [v1,32/33] baseband/acc100: set device min alignment to 1 [v1,33/33] baseband/acc100: update meson file sdk dependency

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK

Commit Message

Hernan Vargas Aug. 16, 2022, 5:52 a.m. UTC

  Add extra values for some log messages. No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff mbox series

Patch

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 93d6db740d..8240df76cc 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1173,6 +1173,7 @@  acc100_dev_info_get(struct rte_bbdev *dev,
 
 	/* Read and save the populated config from ACC100 registers */
 	fetch_acc100_config(dev);
+	/* Check the status of device */
 	dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;
 
 	/* Expose number of queues */
@@ -3255,7 +3256,7 @@  enqueue_ldpc_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 {
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	if (validate_ldpc_enc_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "LDPC encoder validation failed");
+		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -4178,8 +4179,9 @@  acc100_enqueue_status(struct rte_bbdev_queue_data *q_data,
 {
 	q_data->enqueue_status = status;
 	q_data->queue_stats.enqueue_status_count[status]++;
-	rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"",
-			status,
+
+	rte_bbdev_log(WARNING, "Enqueue Status: %s %#"PRIx64"",
+			rte_bbdev_enqueue_status_str(status),
 			q_data->queue_stats.enqueue_status_count[status]);
 }
 
@@ -4879,6 +4881,7 @@  dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
 		return -1;
 
 	rsp.val = atom_desc.rsp.val;
+	rte_bbdev_log_debug("Resp. desc %p: %x\n", desc, rsp.val);
 
 	/* Dequeue */
 	op = desc->req.op_addr;
@@ -4961,8 +4964,9 @@  dequeue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op **ref_op,
 		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 				__ATOMIC_RELAXED);
 		rsp.val = atom_desc.rsp.val;
-		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
-				rsp.val);
+		rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n",
+				desc, rsp.val,
+				cb_idx, cbs_in_tb);
 
 		op->status |= ((rsp.input_err)
 				? (1 << RTE_BBDEV_DATA_ERROR) : 0);