From patchwork Tue Aug 16 05:52:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 115141 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 74C37A00C3; Tue, 16 Aug 2022 00:01:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6D30342C31; Mon, 15 Aug 2022 23:58:03 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id B599D42B7B for ; Mon, 15 Aug 2022 23:57:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660600662; x=1692136662; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r64YDbt7Szw8CVSD1LwLBBZMRsvnEOVK1Lm8XjHf3hY=; b=jkoA7wUbX2ytqBAi4oRGDkoTPzJd3vA5KdeKxxMUUFYg2FOZIuiMwzUw PZ47N8QmRcX2WpxbaPlrxfsmQ/NunKXWGjB/csL/8Lf0VYuvXQzrdE4bz LgXJC1RD/7/HKUTZYjkt7N0GS6+kcrE8/I4LlZ5+21tr31qEBgWP8yNX6 CBILWYWqEUpP4CPxpWTXBHlSw+oK5MWS8mcDX/mDsMQzs7ZY7fe4Naix7 70K1F5q80tl7TcdKyCwXSBinXs0dXPfO2ZiCAVXCzndBNokwWdRcXxXGR cAt56k8CFCJYp2LbSWP77T9u6qz0+8PxzPauHhNYJmX+3E+Ak79k9YvDo A==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="292862753" X-IronPort-AV: E=Sophos;i="5.93,239,1654585200"; d="scan'208";a="292862753" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 14:57:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,239,1654585200"; d="scan'208";a="666826135" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 14:57:41 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v1 32/33] baseband/acc100: set device min alignment to 1 Date: Mon, 15 Aug 2022 22:52:57 -0700 Message-Id: <20220816055258.107564-33-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816055258.107564-1-hernan.vargas@intel.com> References: <20220816055258.107564-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Minimum alignment of buffers set to 1 byte. Signed-off-by: Hernan Vargas --- drivers/baseband/acc100/rte_acc100_pmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 125139c3bb..7755d6402f 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1204,7 +1204,7 @@ acc100_dev_info_get(struct rte_bbdev *dev, d->acc100_conf.q_ul_4g.num_qgroups - 1; dev_info->default_queue_conf = default_queue_conf; dev_info->cpu_flag_reqs = NULL; - dev_info->min_alignment = 64; + dev_info->min_alignment = 1; dev_info->capabilities = bbdev_capabilities; #ifdef ACC100_EXT_MEM dev_info->harq_buffer_size = d->ddr_size;