From patchwork Tue Aug 16 15:49:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 115177 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3C45AA00C3; Tue, 16 Aug 2022 17:49:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D70B840691; Tue, 16 Aug 2022 17:49:47 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 30E1C40150 for ; Tue, 16 Aug 2022 17:49:46 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 27GDv9Ew003637; Tue, 16 Aug 2022 08:49:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=kGkPcBcIjGLpd8qU+xgIctAL53GuKBSBoEKaMzTkcB4=; b=NQiSL93d/HeueW/5U7zrGOi3ioV1cLHxGN+ByllvZu+9TOEH7aKbtDPjhOpoNqklhdeH HGWZH7vsZAyVERRhJSuFF4VOVhCra2jZPX/7bDkqf6cy5vAZHyKcSyBuP+k+0u/ii9LK sp5RJJ7zzTrlbdKV75RL+rVStqptf51LRn6h6lRQRtCQhguG1WYLLj7G5je5mCfXPTo8 G6/wk9B29M0K4I0kDG6/2brtHFBwRVwYW0nC101x8Euf7lKjervYHOokRJqV4Of5U19y 6/LEFbgrQj0IG4UA40CgNQIOSFXkc8p/gX5HZnZnRxRf1m+UVK2Zdaq5dMwrgSRTEEEv wg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3j04b9a9re-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 16 Aug 2022 08:49:45 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Aug 2022 08:49:43 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 16 Aug 2022 08:49:43 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.161.88]) by maili.marvell.com (Postfix) with ESMTP id 608A23F7053; Tue, 16 Aug 2022 08:49:39 -0700 (PDT) From: To: , Jay Jayatheerthan CC: , , , , , , , , , , , Pavan Nikhilesh Subject: [PATCH 1/3] eventdev: add element offset to event vector Date: Tue, 16 Aug 2022 21:19:30 +0530 Message-ID: <20220816154932.10168-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: rhQT-uIFoYFpv_c5BTdqBRX2w-s7P-1J X-Proofpoint-ORIG-GUID: rhQT-uIFoYFpv_c5BTdqBRX2w-s7P-1J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-16_08,2022-08-16_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Add ``elem_offset:12`` bit field event vector structure the bits are taken from ``rsvd:15``. The element offset defines the offset into the vector array at which valid elements start. The valid elements count will be equal to nb_elem - elem_offset. Update Rx/Tx adapter SW implementation to use elem_offset. Signed-off-by: Pavan Nikhilesh --- lib/eventdev/rte_event_eth_rx_adapter.c | 1 + lib/eventdev/rte_event_eth_tx_adapter.c | 7 ++++--- lib/eventdev/rte_eventdev.h | 8 ++++++-- 3 files changed, 11 insertions(+), 5 deletions(-) -- 2.25.1 diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c index bf8741d2ea..bd72f9b845 100644 --- a/lib/eventdev/rte_event_eth_rx_adapter.c +++ b/lib/eventdev/rte_event_eth_rx_adapter.c @@ -855,6 +855,7 @@ rxa_init_vector(struct event_eth_rx_adapter *rx_adapter, vec->vector_ev->port = vec->port; vec->vector_ev->queue = vec->queue; vec->vector_ev->attr_valid = true; + vec->vector_ev->elem_offset = 0; TAILQ_INSERT_TAIL(&rx_adapter->vector_list, vec, next); } diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c index b4b37f1cae..da70883e0d 100644 --- a/lib/eventdev/rte_event_eth_tx_adapter.c +++ b/lib/eventdev/rte_event_eth_tx_adapter.c @@ -524,16 +524,17 @@ txa_process_event_vector(struct txa_service_data *txa, queue = vec->queue; tqi = txa_service_queue(txa, port, queue); if (unlikely(tqi == NULL || !tqi->added)) { - rte_pktmbuf_free_bulk(mbufs, vec->nb_elem); + rte_pktmbuf_free_bulk(&mbufs[vec->elem_offset], + vec->nb_elem - vec->elem_offset); rte_mempool_put(rte_mempool_from_obj(vec), vec); return 0; } - for (i = 0; i < vec->nb_elem; i++) { + for (i = vec->elem_offset; i < vec->nb_elem; i++) { nb_tx += rte_eth_tx_buffer(port, queue, tqi->tx_buf, mbufs[i]); } } else { - for (i = 0; i < vec->nb_elem; i++) { + for (i = vec->elem_offset; i < vec->nb_elem; i++) { port = mbufs[i]->port; queue = rte_event_eth_tx_adapter_txq_get(mbufs[i]); tqi = txa_service_queue(txa, port, queue); diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index 6a6f6ea4c1..b0698fe748 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -1060,8 +1060,12 @@ rte_event_dev_close(uint8_t dev_id); */ struct rte_event_vector { uint16_t nb_elem; - /**< Number of elements in this event vector. */ - uint16_t rsvd : 15; + /**< Total number of elements in this event vector. */ + uint16_t elem_offset : 12; + /**< Offset into the vector array where valid elements start from. + * The valid elements count would be nb_elem - elem_offset. + */ + uint16_t rsvd : 3; /**< Reserved for future use */ uint16_t attr_valid : 1; /**< Indicates that the below union attributes have valid information.