From patchwork Tue Sep 27 07:32:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Junfeng Guo X-Patchwork-Id: 116953 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C862A00C2; Tue, 27 Sep 2022 09:34:16 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61F7842B7E; Tue, 27 Sep 2022 09:33:53 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mails.dpdk.org (Postfix) with ESMTP id 43D4042B6F for ; Tue, 27 Sep 2022 09:33:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664264028; x=1695800028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VxfKyJhc5dM45S72bYven3HG9/YDIZlLYlIJPF9ycos=; b=XqcfemgK3EuBdj47Hi7byAuDylihNdTKfMG5N3wPvxtR5oupIsLHEavu JvcXAIY71kxab/xyR1jUNT8MKdSLBujsqUsEFLwy2AS0qMTTVQnbUKfcK O/rEeVx1FNhdh03z0CVb2hFBLsKPRN79rsfO9JP+y3hRQHyzfU3tPGdWN V7MmUmpKcNU9dX+gLq6ICRH/VccOmoJJOXswdKMyDwxHKs9w6NhSMcKC8 Cz6RUGzdK1KFRqFV6KWY6WVjQJvIcdvjXEmSmeQxIW/vqyldg8elPbJU5 y7eMtZNqg8iOpxHbb/oXut6CMRO+OzP6k6TBUmgpgvhW/xE6BpQkLSua0 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="298844128" X-IronPort-AV: E=Sophos;i="5.93,348,1654585200"; d="scan'208";a="298844128" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 00:33:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="866470153" X-IronPort-AV: E=Sophos;i="5.93,348,1654585200"; d="scan'208";a="866470153" Received: from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104]) by fmsmga006.fm.intel.com with ESMTP; 27 Sep 2022 00:33:45 -0700 From: Junfeng Guo To: qi.z.zhang@intel.com, jingjing.wu@intel.com Cc: ferruh.yigit@xilinx.com, dev@dpdk.org, xiaoyun.li@intel.com, awogbemila@google.com, bruce.richardson@intel.com, xueqin.lin@intel.com, junfeng.guo@intel.com Subject: [PATCH v4 5/9] net/gve: add support for MTU setting Date: Tue, 27 Sep 2022 15:32:51 +0800 Message-Id: <20220927073255.1803892-6-junfeng.guo@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220927073255.1803892-1-junfeng.guo@intel.com> References: <20220923093829.3019525-2-junfeng.guo@intel.com> <20220927073255.1803892-1-junfeng.guo@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support dev_ops mtu_set. Signed-off-by: Xiaoyun Li Signed-off-by: Junfeng Guo --- doc/guides/nics/features/gve.ini | 1 + drivers/net/gve/gve_ethdev.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/doc/guides/nics/features/gve.ini b/doc/guides/nics/features/gve.ini index d03e3ac89e..fbff0a5462 100644 --- a/doc/guides/nics/features/gve.ini +++ b/doc/guides/nics/features/gve.ini @@ -6,6 +6,7 @@ [Features] Speed capabilities = Y Link status = Y +MTU update = Y Linux = Y x86-32 = Y x86-64 = Y diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index 43112d901a..5bcc9ab3a0 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -94,12 +94,41 @@ gve_dev_close(struct rte_eth_dev *dev) return err; } +static int +gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) +{ + struct gve_priv *priv = dev->data->dev_private; + int err; + + if (mtu < RTE_ETHER_MIN_MTU || mtu > priv->max_mtu) { + PMD_DRV_LOG(ERR, "MIN MTU is %u MAX MTU is %u", RTE_ETHER_MIN_MTU, priv->max_mtu); + return -EINVAL; + } + + /* mtu setting is forbidden if port is start */ + if (dev->data->dev_started) { + PMD_DRV_LOG(ERR, "Port must be stopped before configuration"); + return -EBUSY; + } + + dev->data->dev_conf.rxmode.mtu = mtu + RTE_ETHER_HDR_LEN; + + err = gve_adminq_set_mtu(priv, mtu); + if (err) { + PMD_DRV_LOG(ERR, "Failed to set mtu as %u err = %d", mtu, err); + return err; + } + + return 0; +} + static const struct eth_dev_ops gve_eth_dev_ops = { .dev_configure = gve_dev_configure, .dev_start = gve_dev_start, .dev_stop = gve_dev_stop, .dev_close = gve_dev_close, .link_update = gve_link_update, + .mtu_set = gve_dev_mtu_set, }; static void