net/mlx5/hws: remove deprecated rte_atomic

Message ID 20221030161200.32662-1-valex@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5/hws: remove deprecated rte_atomic |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/github-robot: build fail github build: failed

Commit Message

Alex Vesker Oct. 30, 2022, 4:11 p.m. UTC
  The use of rte_atomic functions is deprecated and is not
required in HWS code. HWS refcounts are used only during
control and always under lock.

Fixes: f8c8a6d8440d ("net/mlx5/hws: add action object")
Signed-off-by: Alex Vesker <valex@nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_action.c  | 8 +++-----
 drivers/net/mlx5/hws/mlx5dr_action.h  | 2 +-
 drivers/net/mlx5/hws/mlx5dr_pat_arg.c | 8 +++-----
 drivers/net/mlx5/hws/mlx5dr_pat_arg.h | 2 +-
 4 files changed, 8 insertions(+), 12 deletions(-)
  

Comments

Matan Azrad Nov. 2, 2022, 12:30 p.m. UTC | #1
> The use of rte_atomic functions is deprecated and is not required in HWS
> code. HWS refcounts are used only during control and always under lock.
> 
> Fixes: f8c8a6d8440d ("net/mlx5/hws: add action object")
> Signed-off-by: Alex Vesker <valex@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
  
Raslan Darawsheh Nov. 3, 2022, 11:39 a.m. UTC | #2
Hi,

> -----Original Message-----
> From: Alex Vesker <valex@nvidia.com>
> Sent: Sunday, October 30, 2022 6:12 PM
> To: Alex Vesker <valex@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; NBU-Contact-Thomas Monjalon (EXTERNAL)
> <thomas@monjalon.net>; Suanming Mou <suanmingm@nvidia.com>;
> Matan Azrad <matan@nvidia.com>
> Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: remove deprecated rte_atomic
> 
> The use of rte_atomic functions is deprecated and is not required in HWS
> code. HWS refcounts are used only during control and always under lock.
> 
> Fixes: f8c8a6d8440d ("net/mlx5/hws: add action object")
> Signed-off-by: Alex Vesker <valex@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 755d5d09cf..a9e12aa1f5 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -83,7 +83,7 @@  static int mlx5dr_action_get_shared_stc_nic(struct mlx5dr_context *ctx,
 
 	pthread_spin_lock(&ctx->ctrl_lock);
 	if (ctx->common_res[tbl_type].shared_stc[stc_type]) {
-		rte_atomic32_add(&ctx->common_res[tbl_type].shared_stc[stc_type]->refcount, 1);
+		ctx->common_res[tbl_type].shared_stc[stc_type]->refcount++;
 		pthread_spin_unlock(&ctx->ctrl_lock);
 		return 0;
 	}
@@ -123,9 +123,7 @@  static int mlx5dr_action_get_shared_stc_nic(struct mlx5dr_context *ctx,
 	}
 
 	ctx->common_res[tbl_type].shared_stc[stc_type] = shared_stc;
-
-	rte_atomic32_init(&ctx->common_res[tbl_type].shared_stc[stc_type]->refcount);
-	rte_atomic32_set(&ctx->common_res[tbl_type].shared_stc[stc_type]->refcount, 1);
+	ctx->common_res[tbl_type].shared_stc[stc_type]->refcount = 1;
 
 	pthread_spin_unlock(&ctx->ctrl_lock);
 
@@ -145,7 +143,7 @@  static void mlx5dr_action_put_shared_stc_nic(struct mlx5dr_context *ctx,
 	struct mlx5dr_action_shared_stc *shared_stc;
 
 	pthread_spin_lock(&ctx->ctrl_lock);
-	if (!rte_atomic32_dec_and_test(&ctx->common_res[tbl_type].shared_stc[stc_type]->refcount)) {
+	if (--ctx->common_res[tbl_type].shared_stc[stc_type]->refcount) {
 		pthread_spin_unlock(&ctx->ctrl_lock);
 		return;
 	}
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h
index f14d91f994..3b31ffc90e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.h
+++ b/drivers/net/mlx5/hws/mlx5dr_action.h
@@ -70,7 +70,7 @@  struct mlx5dr_action_default_stc {
 
 struct mlx5dr_action_shared_stc {
 	struct mlx5dr_pool_chunk remove_header;
-	rte_atomic32_t refcount;
+	uint32_t refcount;
 };
 
 struct mlx5dr_actions_apply_data {
diff --git a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
index 46fdc8ce68..df451f1ae0 100644
--- a/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
+++ b/drivers/net/mlx5/hws/mlx5dr_pat_arg.c
@@ -128,7 +128,7 @@  mlx5dr_pat_get_existing_cached_pattern(struct mlx5dr_pattern_cache *cache,
 		/* LRU: move it to be first in the list */
 		LIST_REMOVE(cached_pattern, next);
 		LIST_INSERT_HEAD(&cache->head, cached_pattern, next);
-		rte_atomic32_add(&cached_pattern->refcount, 1);
+		cached_pattern->refcount++;
 	}
 
 	return cached_pattern;
@@ -179,9 +179,7 @@  mlx5dr_pat_add_pattern_to_cache(struct mlx5dr_pattern_cache *cache,
 	       num_of_actions * MLX5DR_MODIFY_ACTION_SIZE);
 
 	LIST_INSERT_HEAD(&cache->head, cached_pattern, next);
-
-	rte_atomic32_init(&cached_pattern->refcount);
-	rte_atomic32_set(&cached_pattern->refcount, 1);
+	cached_pattern->refcount = 1;
 
 	return cached_pattern;
 
@@ -212,7 +210,7 @@  mlx5dr_pat_put_pattern(struct mlx5dr_pattern_cache *cache,
 		goto out;
 	}
 
-	if (!rte_atomic32_dec_and_test(&cached_pattern->refcount))
+	if (--cached_pattern->refcount)
 		goto out;
 
 	mlx5dr_pat_remove_pattern(cached_pattern);
diff --git a/drivers/net/mlx5/hws/mlx5dr_pat_arg.h b/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
index 8a4670427f..d9353e9a3e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
+++ b/drivers/net/mlx5/hws/mlx5dr_pat_arg.h
@@ -35,7 +35,7 @@  struct mlx5dr_pat_cached_pattern {
 		uint8_t *data;
 		uint16_t num_of_actions;
 	} mh_data;
-	rte_atomic32_t refcount;
+	uint32_t refcount;
 	LIST_ENTRY(mlx5dr_pat_cached_pattern) next;
 };