common/mlx5: fix DevX register read error severity
Checks
Commit Message
PMD attempt to read HW UTC counter properties can fail because the feature
has no support in port FW or mlx5 kernel module.
In that case PMD still can produce correct time-stamps if it runs on core with
nanosecond time resolution.
Fixes: b0067860959d ("common/mlx5: update log for DevX general command failure")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/common/mlx5/mlx5_devx_cmds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Thu, Nov 10, 2022 at 2:06 PM Gregory Etelson <getelson@nvidia.com> wrote:
>
> PMD attempt to read HW UTC counter properties can fail because the feature
> has no support in port FW or mlx5 kernel module.
>
> In that case PMD still can produce correct time-stamps if it runs on core with
> nanosecond time resolution.
>
> Fixes: b0067860959d ("common/mlx5: update log for DevX general command failure")
>
No blank line here.
> Cc: stable@dpdk.org
>
Reported-by: David Marchand <david.marchand@redhat.com>
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
I had tested the same change to pass OVS unit tests.
I did not hit any other error level messages from functions changed in
b0067860959d ("common/mlx5: update log for DevX general command
failure").
So I guess only changing this one is enough.
Acked-by: David Marchand <david.marchand@redhat.com>
Hi,
> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Thursday, November 10, 2022 3:05 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org; Slava Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] common/mlx5: fix DevX register read error severity
>
> PMD attempt to read HW UTC counter properties can fail because the
> feature
> has no support in port FW or mlx5 kernel module.
>
> In that case PMD still can produce correct time-stamps if it runs on core with
> nanosecond time resolution.
>
> Fixes: b0067860959d ("common/mlx5: update log for DevX general command
> failure")
> removed extra blank line
> Cc: stable@dpdk.org
>
added reported-by tag
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
@@ -111,7 +111,7 @@ mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id, uint32_t arg,
MLX5_ST_SZ_BYTES(access_register_out) +
sizeof(uint32_t) * dw_cnt);
if (rc || MLX5_FW_STATUS(out)) {
- DEVX_DRV_LOG(ERR, out, "read access", "NIC register", reg_id);
+ DEVX_DRV_LOG(DEBUG, out, "read access", "NIC register", reg_id);
return MLX5_DEVX_ERR_RC(rc);
}
memcpy(data, &out[MLX5_ST_SZ_DW(access_register_out)],