From patchwork Fri Nov 18 17:19:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Dooley X-Patchwork-Id: 119973 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5DADCA00C4; Fri, 18 Nov 2022 18:19:16 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 06F5840041; Fri, 18 Nov 2022 18:19:16 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id F0BDB4003F; Fri, 18 Nov 2022 18:19:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668791954; x=1700327954; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M0bY1n27CxW/1K+CEJk8XDtySj2YrerN1PcokcS4Z7s=; b=XAt2UMkZ7FVmj4ZS+8WI1aN1UVCNhHvDD7Pg5agvX5jxnZ1O6YlIF3Fq m/CSheQdzBmE4gIWU9UQs25Eg3jcifvpXyRbZzfCOcinrc0vnmZuIhU25 1oa2pX1Y1Kbnd5FvVzjBOwR3DN1dTsEXDZcyTq+LvXUdi3j1bbb12bV+8 a37CAn8v5ofvllae1eJvaVZB0oEB8H60Rv0g1JhOfFDpW5JLaemTle+rx /o1b5nrpjwIUgqkKB2BA7a3A8lIJ+yX3CM6YTgwpOmADU2LAcFQK9DO4Y 5PiINBZ7dOgc6Emjl/JixDjQSGmGjDWkzowT2nYlqyR9iqYBPsQ9Qxmpa Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10535"; a="314337134" X-IronPort-AV: E=Sophos;i="5.96,174,1665471600"; d="scan'208";a="314337134" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2022 09:19:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10535"; a="969344017" X-IronPort-AV: E=Sophos;i="5.96,175,1665471600"; d="scan'208";a="969344017" Received: from silpixa00400883.ir.intel.com ([10.243.23.158]) by fmsmga005.fm.intel.com with ESMTP; 18 Nov 2022 09:19:10 -0800 From: Brian Dooley To: Kai Ji Cc: dev@dpdk.org, stable@dpdk.org, gakhil@marvell.com, Brian Dooley Subject: [PATCH v2] doc: update QAT device support Date: Fri, 18 Nov 2022 17:19:08 +0000 Message-Id: <20221118171909.134666-1-brian.dooley@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221115143444.461167-1-brian.dooley@intel.com> References: <20221115143444.461167-1-brian.dooley@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Update what drivers and devices are supported for Asymmetric Crypto Service on QAT Signed-off-by: Brian Dooley Acked-by: Kai Ji Acked-by: Kai Ji --- doc/guides/cryptodevs/qat.rst | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 2d895e61ac..76d8187298 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -168,8 +168,8 @@ poll mode crypto driver support for the following hardware accelerator devices: * ``Intel QuickAssist Technology C62x`` * ``Intel QuickAssist Technology C3xxx`` * ``Intel QuickAssist Technology D15xx`` -* ``Intel QuickAssist Technology C4xxx`` * ``Intel QuickAssist Technology 4xxx`` +* ``Intel QuickAssist Technology 401xxx`` The QAT ASYM PMD has support for: @@ -393,9 +393,15 @@ to see the full table) +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ - | Yes | No | No | 4 | 4xxx | N/A | qat_4xxx | 4xxx | 4940 | 4 | 4941 | 16 | + | Yes | Yes | No | 4 | 4xxx | linux/5.11+ | qat_4xxx | 4xxx | 4940 | 4 | 4941 | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | Yes | Yes | 4 | 4xxx | linux/5.17+ | qat_4xxx | 4xxx | 4940 | 4 | 4941 | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | No | No | 4 | 4xxx | IDZ/ N/A | qat_4xxx | 4xxx | 4940 | 4 | 4941 | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | Yes | Yes | 4 | 401xxx | linux/5.19+ | qat_401xxx | 4xxx | 4942 | 2 | 4943 | 16 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ - | Yes | No | No | 4 | 401xxx | N/A | qat_401xxx | 4xxx | 4942 | 2 | 4943 | 16 | + | Yes | No | No | 4 | 401xxx | IDZ/ N/A | qat_401xxx | 4xxx | 4942 | 2 | 4943 | 16 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ * Note: Symmetric mixed crypto algorithms feature on Gen 2 works only with IDZ driver version 4.9.0+ @@ -416,6 +422,11 @@ If you are running on a kernel which includes a driver for your device, see `Installation using IDZ QAT driver`_. +.. Note:: + + The Asymmetric service is not supported by DPDK QAT PMD for the Gen 3 platform. + The actual Crypto services enabled on the system depend on QAT driver capabilities and hardware slice configuration. + Installation using kernel.org driver ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~