diff mbox series

[v4,2/5] failsafe: use public rx/tx burst API

Message ID 20221129152516.4513-3-lucp.at.work@gmail.com (mailing list archive)
State Changes Requested, archived
Delegated to: Ferruh Yigit
Headers
Series None |

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing warning Testing issues

Commit Message

Luc Pelletier Nov. 29, 2022, 3:25 p.m. UTC 
  The failsafe rx/tx functions are calling the rx/tx functions of
sub-devices via the function pointers stored in the rte_eth_dev
structure rather than use the public APIs (rte_eth_rx/tx_burst).

Use the public API rather than access structure internals which could
change in the future.

Signed-off-by: Luc Pelletier <lucp.at.work@gmail.com>
---
 drivers/net/failsafe/failsafe_rxtx.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/failsafe/failsafe_rxtx.c b/drivers/net/failsafe/failsafe_rxtx.c
index 707fe60a36..6d8ab0a6e7 100644
--- a/drivers/net/failsafe/failsafe_rxtx.c
+++ b/drivers/net/failsafe/failsafe_rxtx.c
@@ -50,7 +50,6 @@  failsafe_rx_burst(void *queue,
 {
 	struct sub_device *sdev;
 	struct rxq *rxq;
-	void *sub_rxq;
 	uint16_t nb_rx;
 
 	rxq = queue;
@@ -61,10 +60,8 @@  failsafe_rx_burst(void *queue,
 			sdev = sdev->next;
 			continue;
 		}
-		sub_rxq = ETH(sdev)->data->rx_queues[rxq->qid];
 		FS_ATOMIC_P(rxq->refcnt[sdev->sid]);
-		nb_rx = ETH(sdev)->
-			rx_pkt_burst(sub_rxq, rx_pkts, nb_pkts);
+		nb_rx = rte_eth_rx_burst(PORT_ID(sdev), rxq->qid, rx_pkts, nb_pkts);
 		FS_ATOMIC_V(rxq->refcnt[sdev->sid]);
 		sdev = sdev->next;
 	} while (nb_rx == 0 && sdev != rxq->sdev);
@@ -82,16 +79,14 @@  failsafe_tx_burst(void *queue,
 {
 	struct sub_device *sdev;
 	struct txq *txq;
-	void *sub_txq;
 	uint16_t nb_tx;
 
 	txq = queue;
 	sdev = TX_SUBDEV(&rte_eth_devices[txq->priv->data->port_id]);
 	if (unlikely(fs_tx_unsafe(sdev)))
 		return 0;
-	sub_txq = ETH(sdev)->data->tx_queues[txq->qid];
 	FS_ATOMIC_P(txq->refcnt[sdev->sid]);
-	nb_tx = ETH(sdev)->tx_pkt_burst(sub_txq, tx_pkts, nb_pkts);
+	nb_tx = rte_eth_tx_burst(PORT_ID(sdev), txq->qid, tx_pkts, nb_pkts);
 	FS_ATOMIC_V(txq->refcnt[sdev->sid]);
 	return nb_tx;
 }