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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BL02EPF0000EE3D.mail.protection.outlook.com (10.167.241.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5880.8 via Frontend Transport; Mon, 12 Dec 2022 09:01:38 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 12 Dec 2022 01:01:18 -0800 Received: from nvidia.com (10.126.231.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 12 Dec 2022 01:01:16 -0800 From: Leo Xu To: CC: Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko Subject: [PATCH 2/3] net/mlx5: add ICMPv6 id and sequence match support Date: Mon, 12 Dec 2022 10:59:21 +0200 Message-ID: <20221212085923.2314350-3-yongquanx@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221212085923.2314350-1-yongquanx@nvidia.com> References: <20221212085923.2314350-1-yongquanx@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000EE3D:EE_|CH2PR12MB4120:EE_ X-MS-Office365-Filtering-Correlation-Id: b0bb59c5-79fe-4343-6a54-08dadc1f7af4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Dec 2022 09:01:38.9094 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b0bb59c5-79fe-4343-6a54-08dadc1f7af4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000EE3D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4120 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds ICMPv6 id and sequence match support. Since type and code of ICMPv6 echo is already specified by ITEM type: RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY mlx5 pmd will set appropriate type and code automatically: Echo request: type(128), code(0) Echo reply: type(129), code(0) type and code provided by application will be ignored. Signed-off-by: Leo Xu --- doc/guides/nics/mlx5.rst | 2 +- drivers/net/mlx5/mlx5_flow.c | 61 ++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow.h | 4 ++ drivers/net/mlx5/mlx5_flow_dv.c | 76 +++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 2 + 5 files changed, 144 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 328c728f13..d17bb1fe47 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -328,7 +328,7 @@ Limitations - The input buffer, providing the removal size, is not validated. - The buffer size must match the length of the headers to be removed. -- ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all +- ICMP(code/type/identifier/sequence number) / ICMP6(code/type/identifier/sequence number) matching, IP-in-IP and MPLS flow matching are all mutually exclusive features which cannot be supported together (see :ref:`mlx5_firmware_config`). diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 114451b872..bf6a3010ca 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -2442,6 +2442,67 @@ mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, return 0; } +/** + * Validate ICMP6 echo request/reply item. + * + * @param[in] item + * Item specification. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. + * @param[in] ext_vlan_sup + * Whether extended VLAN features are supported or not. + * @param[out] error + * Pointer to error structure. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +int +mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item, + uint64_t item_flags, + uint8_t target_protocol, + struct rte_flow_error *error) +{ + const struct rte_flow_item_icmp6_echo *mask = item->mask; + const struct rte_flow_item_icmp6_echo nic_mask = { + .echo.hdr.type = 0xff, + .echo.hdr.code = 0xff, + .echo.identifier = RTE_BE16(0xffff), + .echo.sequence = RTE_BE16(0xffff), + }; + const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); + const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : + MLX5_FLOW_LAYER_OUTER_L3_IPV6; + const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : + MLX5_FLOW_LAYER_OUTER_L4; + int ret; + + if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "protocol filtering not compatible" + " with ICMP6 layer"); + if (!(item_flags & l3m)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "IPv6 is mandatory to filter on" + " ICMP6"); + if (item_flags & l4m) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, item, + "multiple L4 layers not supported"); + if (!mask) + mask = &nic_mask; + ret = mlx5_flow_item_acceptable + (item, (const uint8_t *)mask, + (const uint8_t *)&nic_mask, + sizeof(struct rte_flow_item_icmp6_echo), + MLX5_ITEM_RANGE_NOT_ACCEPTED, error); + if (ret < 0) + return ret; + return 0; +} + /** * Validate ICMP item. * diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 322ffc5651..e9d763cd4c 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2333,6 +2333,10 @@ int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, uint64_t item_flags, uint8_t target_protocol, struct rte_flow_error *error); +int mlx5_flow_validate_item_icmp6_echo(const struct rte_flow_item *item, + uint64_t item_flags, + uint8_t target_protocol, + struct rte_flow_error *error); int mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, uint64_t item_flags, uint8_t target_protocol, diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 49425087d6..1ecfd13d67 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -6194,6 +6194,17 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, item_ipv6_proto = IPPROTO_ICMPV6; last_item = MLX5_FLOW_LAYER_ICMP6; break; + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST: + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY: + ret = mlx5_flow_validate_item_icmp6_echo(items, + item_flags, + next_protocol, + error); + if (ret < 0) + return ret; + item_ipv6_proto = IPPROTO_ICMPV6; + last_item = MLX5_FLOW_LAYER_ICMP6; + break; case RTE_FLOW_ITEM_TYPE_TAG: ret = flow_dv_validate_item_tag(dev, items, attr, error); @@ -9165,6 +9176,65 @@ flow_dv_translate_item_icmp6(void *key, const struct rte_flow_item *item, icmp6_v->code & icmp6_m->code); } +/** + * Add ICMP6 echo request/reply item to the value. + * + * @param[in, out] key + * Flow matcher value. + * @param[in] item + * Flow pattern to translate. + * @param[in] inner + * Item is inner pattern. + * @param[in] key_type + * Set flow matcher mask or value. + */ +static void +flow_dv_translate_item_icmp6_echo(void *key, const struct rte_flow_item *item, + int inner, uint32_t key_type) +{ + const struct rte_flow_item_icmp6_echo *icmp6_m; + const struct rte_flow_item_icmp6_echo *icmp6_v; + uint32_t icmp6_header_data_m = 0; + uint32_t icmp6_header_data_v = 0; + void *headers_v; + void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3); + uint8_t icmp6_type = 0; + struct rte_flow_item_icmp6_echo zero_mask; + + memset(&zero_mask, 0, sizeof(zero_mask)); + headers_v = inner ? MLX5_ADDR_OF(fte_match_param, key, inner_headers) : + MLX5_ADDR_OF(fte_match_param, key, outer_headers); + if (key_type & MLX5_SET_MATCHER_M) + MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xFF); + else + MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, + IPPROTO_ICMPV6); + MLX5_ITEM_UPDATE(item, key_type, icmp6_v, icmp6_m, &zero_mask); + /* Set fixed type and code for icmpv6 echo request or reply */ + icmp6_type = (item->type == RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST ? + RTE_ICMP6_ECHO_REQUEST : RTE_ICMP6_ECHO_REPLY); + if (key_type & MLX5_SET_MATCHER_M) { + MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, 0xFF); + MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0xFF); + } else { + MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type, icmp6_type); + MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code, 0); + } + if (icmp6_v == NULL) + return; + /* Set icmp6 header data (identifier & sequence) accordingly */ + icmp6_header_data_m = + (rte_be_to_cpu_16(icmp6_m->echo.identifier) << 16) | + rte_be_to_cpu_16(icmp6_m->echo.sequence); + if (icmp6_header_data_m) { + icmp6_header_data_v = + (rte_be_to_cpu_16(icmp6_v->echo.identifier) << 16) | + rte_be_to_cpu_16(icmp6_v->echo.sequence); + MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_header_data, + icmp6_header_data_v & icmp6_header_data_m); + } +} + /** * Add ICMP item to the value. * @@ -12804,6 +12874,12 @@ flow_dv_translate_items(struct rte_eth_dev *dev, wks->priority = MLX5_PRIORITY_MAP_L4; last_item = MLX5_FLOW_LAYER_ICMP6; break; + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST: + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY: + flow_dv_translate_item_icmp6_echo(key, items, tunnel, key_type); + wks->priority = MLX5_PRIORITY_MAP_L4; + last_item = MLX5_FLOW_LAYER_ICMP6; + break; case RTE_FLOW_ITEM_TYPE_TAG: flow_dv_translate_item_tag(dev, key, items, key_type); last_item = MLX5_FLOW_ITEM_TAG; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 8d59e73581..f9ad862707 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -4765,6 +4765,8 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, case RTE_FLOW_ITEM_TYPE_GRE_OPTION: case RTE_FLOW_ITEM_TYPE_ICMP: case RTE_FLOW_ITEM_TYPE_ICMP6: + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REQUEST: + case RTE_FLOW_ITEM_TYPE_ICMP6_ECHO_REPLY: case RTE_FLOW_ITEM_TYPE_CONNTRACK: case RTE_FLOW_ITEM_TYPE_QUOTA: break;