diff mbox series

[04/17] crypto/cnxk: add context to passthrough instruction

Message ID 20221220143232.2519650-5-ktejasree@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series fixes and improvements to cnxk crytpo PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tejasree Kondoj Dec. 20, 2022, 2:32 p.m. UTC 
  From: Volodymyr Fialko <vfialko@marvell.com>

Attach valid context of last packet instruction to the passthrough
instruction to match hardware requirements.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 7dad370047..2c750d19bf 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -36,6 +36,7 @@  struct ops_burst {
 struct vec_request {
 	struct cpt_inflight_req *req;
 	struct rte_event_vector *vec;
+	union cpt_inst_w7 w7;
 	uint64_t w2;
 };
 
@@ -387,7 +388,7 @@  cn10k_ca_meta_info_extract(struct rte_crypto_op *op, struct cnxk_cpt_qp **qp, ui
 
 static inline void
 cn10k_cpt_vec_inst_fill(struct vec_request *vec_req, struct cpt_inst_s *inst,
-			struct cnxk_cpt_qp *qp)
+			struct cnxk_cpt_qp *qp, union cpt_inst_w7 w7)
 {
 	const union cpt_res_s res = {.cn10k.compcode = CPT_COMP_NOT_DONE};
 	struct cpt_inflight_req *infl_req = vec_req->req;
@@ -400,6 +401,8 @@  cn10k_cpt_vec_inst_fill(struct vec_request *vec_req, struct cpt_inst_s *inst,
 		.s.dlen = 0,
 	};
 
+	w7.s.egrp = ROC_CPT_DFLT_ENG_GRP_SE;
+
 	infl_req->vec = vec_req->vec;
 	infl_req->qp = qp;
 
@@ -410,7 +413,7 @@  cn10k_cpt_vec_inst_fill(struct vec_request *vec_req, struct cpt_inst_s *inst,
 	inst->w2.u64 = vec_req->w2;
 	inst->w3.u64 = CNXK_CPT_INST_W3(1, infl_req);
 	inst->w4.u64 = w4.u64;
-	inst->w7.u64 = ROC_CPT_DFLT_ENG_GRP_SE << 61;
+	inst->w7.u64 = w7.u64;
 }
 
 static void
@@ -451,7 +454,7 @@  cn10k_cpt_vec_submit(struct vec_request vec_tbl[], uint16_t vec_tbl_len, struct
 again:
 	burst_size = RTE_MIN(PKTS_PER_STEORL, vec_tbl_len);
 	for (i = 0; i < burst_size; i++)
-		cn10k_cpt_vec_inst_fill(&vec_tbl[i], &inst[i * 2], qp);
+		cn10k_cpt_vec_inst_fill(&vec_tbl[i], &inst[i * 2], qp, vec_tbl[0].w7);
 
 	do {
 		fc.u64[0] = __atomic_load_n(fc_addr, __ATOMIC_RELAXED);
@@ -590,6 +593,10 @@  next_op:;
 		roc_lmt_submit_steorl(lmt_arg, io_addr);
 	}
 
+	/* Store w7 of last successfully filled instruction */
+	inst = &inst_base[2 * (i - 1)];
+	vec_tbl[0].w7 = inst->w7;
+
 	rte_io_wmb();
 
 put: