From patchwork Wed Dec 21 13:21:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srujana Challa X-Patchwork-Id: 121234 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 41F6BA034C; Wed, 21 Dec 2022 14:21:52 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 25C8B40A7F; Wed, 21 Dec 2022 14:21:52 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8E97040A7A for ; Wed, 21 Dec 2022 14:21:50 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BLABi9Z017593; Wed, 21 Dec 2022 05:21:49 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=5VIDgowfYfLVv5DwGGW+pGArVUTb3hJG/ioR+OUCPWU=; b=C5cX3VGZu6TaxvgmwQQ9kQuzdm+02tnURXBitRglQPly4+iJIVxMtCQfVZ+buc7GGHqc PP2XLkD5ccmVB2qdPLiMHmK3hqySIWmGPDQu9+w3KHgQlxXlNZb9V+Rg358vOpG8Y2ha dRaulyaYcm3PV/8+abgej28012BBZkLa2Ep0bDkcPzFsMjH0mdXCyxbd3MOk0aKZVU7Z 1sEZJxoibn5X40oF8qUECF1elZF/NUIh7MZDasBxJ3fQu3D0x7jqzbJsKCprr9QHayBT hp7K3eLdlzOWWJ3vDBMWhWGUyOFyMHvswnhl0qVwx4V77ZfeE303Le39+Qa/e91NR0ou 2Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3mksuxads3-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Dec 2022 05:21:49 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 21 Dec 2022 05:21:48 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Wed, 21 Dec 2022 05:21:48 -0800 Received: from localhost.localdomain (unknown [10.28.36.175]) by maili.marvell.com (Postfix) with ESMTP id B7D483F7070; Wed, 21 Dec 2022 05:21:45 -0800 (PST) From: Srujana Challa To: , CC: , , , , , Subject: [PATCH 1/4] common/cnxk: add CPT HW error callback register functions Date: Wed, 21 Dec 2022 18:51:39 +0530 Message-ID: <20221221132142.2732040-1-schalla@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: oHp5srH45mY3N2CW9hG1qLmv1YdYpTY6 X-Proofpoint-ORIG-GUID: oHp5srH45mY3N2CW9hG1qLmv1YdYpTY6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-21_07,2022-12-21_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Adds functions to register callback API to report CPT_MISC_INT to the driver. Signed-off-by: Srujana Challa --- drivers/common/cnxk/roc_cpt.c | 31 +++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_cpt.h | 8 +++++++- drivers/common/cnxk/version.map | 2 ++ 3 files changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index fb97ec89b2..bf0d1cff9c 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -25,6 +25,11 @@ #define CPT_LF_DEFAULT_NB_DESC 1024 #define CPT_LF_FC_MIN_THRESHOLD 32 +static struct cpt_int_cb { + roc_cpt_int_misc_cb_t cb; + void *cb_args; +} int_cb; + static void cpt_lf_misc_intr_enb_dis(struct roc_cpt_lf *lf, bool enb) { @@ -57,6 +62,9 @@ cpt_lf_misc_irq(void *param) /* Clear interrupt */ plt_write64(intr, lf->rbase + CPT_LF_MISC_INT); + + if (int_cb.cb != NULL) + int_cb.cb(lf, int_cb.cb_args); } static int @@ -1079,3 +1087,26 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, return 0; } + +void +roc_cpt_int_misc_cb_register(roc_cpt_int_misc_cb_t cb, void *args) +{ + if (int_cb.cb != NULL) + return; + + int_cb.cb = cb; + int_cb.cb_args = args; +} + +int +roc_cpt_int_misc_cb_unregister(roc_cpt_int_misc_cb_t cb, void *args) +{ + if (int_cb.cb == NULL) + return 0; + if (int_cb.cb != cb || int_cb.cb_args != args) + return -EINVAL; + + int_cb.cb = NULL; + int_cb.cb_args = NULL; + return 0; +} diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index bc9cc19edd..ac8be1b475 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -131,7 +131,7 @@ struct roc_cpt { union cpt_eng_caps hw_caps[CPT_MAX_ENG_TYPES]; uint8_t eng_grp[CPT_MAX_ENG_TYPES]; uint8_t cpt_revision; - + void *opaque; #define ROC_CPT_MEM_SZ (6 * 1024) uint8_t reserved[ROC_CPT_MEM_SZ] __plt_cache_aligned; } __plt_cache_aligned; @@ -144,6 +144,9 @@ struct roc_cpt_rxc_time_cfg { uint16_t zombie_thres; }; +/* CPT MISC interrupt callback */ +typedef void (*roc_cpt_int_misc_cb_t)(struct roc_cpt_lf *lf, void *args); + int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg); int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt); @@ -174,4 +177,7 @@ int __roc_api roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, void __roc_api roc_cpt_parse_hdr_dump(const struct cpt_parse_hdr_s *cpth); int __roc_api roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, uint16_t sa_len); + +void __roc_api roc_cpt_int_misc_cb_register(roc_cpt_int_misc_cb_t cb, void *args); +int __roc_api roc_cpt_int_misc_cb_unregister(roc_cpt_int_misc_cb_t cb, void *args); #endif /* _ROC_CPT_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 17f0ec6b48..d6d96dd3eb 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -78,6 +78,8 @@ INTERNAL { roc_cpt_parse_hdr_dump; roc_cpt_rxc_time_cfg; roc_cpt_ctx_write; + roc_cpt_int_misc_cb_register; + roc_cpt_int_misc_cb_unregister; roc_dpi_configure; roc_dpi_dev_fini; roc_dpi_dev_init;