diff mbox series

[12/21] net/cpfl: support RSS

Message ID 20221223015558.3143279-13-mingxia.liu@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series add support for cpfl PMD in DPDK |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Liu, Mingxia Dec. 23, 2022, 1:55 a.m. UTC 
  Add RSS support.

Signed-off-by: Mingxia Liu <mingxia.liu@intel.com>
---
 drivers/net/cpfl/cpfl_ethdev.c | 52 ++++++++++++++++++++++++++++++++++
 drivers/net/cpfl/cpfl_ethdev.h | 15 ++++++++++
 2 files changed, 67 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c
index ccd9783f5c..8e1d60e2d0 100644
--- a/drivers/net/cpfl/cpfl_ethdev.c
+++ b/drivers/net/cpfl/cpfl_ethdev.c
@@ -97,6 +97,8 @@  cpfl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 	dev_info->max_mtu = dev_info->max_rx_pktlen - CPFL_ETH_OVERHEAD;
 	dev_info->min_mtu = RTE_ETHER_MIN_MTU;
 
+	dev_info->flow_type_rss_offloads = CPFL_RSS_OFFLOAD_ALL;
+
 	dev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
 
 	dev_info->default_txconf = (struct rte_eth_txconf) {
@@ -153,10 +155,49 @@  cpfl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
 	return ptypes;
 }
 
+static int
+cpfl_init_rss(struct idpf_vport *vport)
+{
+	struct rte_eth_rss_conf *rss_conf;
+	struct rte_eth_dev_data *dev_data;
+	uint16_t i, nb_q;
+	int ret = 0;
+
+	dev_data = vport->dev_data;
+	rss_conf = &dev_data->dev_conf.rx_adv_conf.rss_conf;
+	nb_q = dev_data->nb_rx_queues;
+
+	if (rss_conf->rss_key == NULL) {
+		for (i = 0; i < vport->rss_key_size; i++)
+			vport->rss_key[i] = (uint8_t)rte_rand();
+	} else if (rss_conf->rss_key_len != vport->rss_key_size) {
+		PMD_INIT_LOG(ERR, "Invalid RSS key length in RSS configuration, should be %d",
+			     vport->rss_key_size);
+		return -EINVAL;
+	} else {
+		rte_memcpy(vport->rss_key, rss_conf->rss_key,
+			   vport->rss_key_size);
+	}
+
+	for (i = 0; i < vport->rss_lut_size; i++)
+		vport->rss_lut[i] = i % nb_q;
+
+	vport->rss_hf = IDPF_DEFAULT_RSS_HASH_EXPANDED;
+
+	ret = idpf_config_rss(vport);
+	if (ret != 0)
+		PMD_INIT_LOG(ERR, "Failed to configure RSS");
+
+	return ret;
+}
+
 static int
 cpfl_dev_configure(struct rte_eth_dev *dev)
 {
+	struct idpf_vport *vport = dev->data->dev_private;
 	struct rte_eth_conf *conf = &dev->data->dev_conf;
+	struct idpf_adapter *adapter = vport->adapter;
+	int ret;
 
 	if (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) {
 		PMD_INIT_LOG(ERR, "Setting link speed is not supported");
@@ -195,6 +236,17 @@  cpfl_dev_configure(struct rte_eth_dev *dev)
 		return -ENOTSUP;
 	}
 
+	if (adapter->caps.rss_caps != 0 && dev->data->nb_rx_queues != 0) {
+		ret = cpfl_init_rss(vport);
+		if (ret != 0) {
+			PMD_INIT_LOG(ERR, "Failed to init rss");
+			return ret;
+		}
+	} else {
+		PMD_INIT_LOG(ERR, "RSS is not supported.");
+		return -1;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/net/cpfl/cpfl_ethdev.h b/drivers/net/cpfl/cpfl_ethdev.h
index 714149df32..03b87a9976 100644
--- a/drivers/net/cpfl/cpfl_ethdev.h
+++ b/drivers/net/cpfl/cpfl_ethdev.h
@@ -35,6 +35,21 @@ 
 #define CPFL_ETH_OVERHEAD \
 	(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + CPFL_VLAN_TAG_SIZE * 2)
 
+#define CPFL_RSS_OFFLOAD_ALL (				\
+		RTE_ETH_RSS_IPV4                |	\
+		RTE_ETH_RSS_FRAG_IPV4           |	\
+		RTE_ETH_RSS_NONFRAG_IPV4_TCP    |	\
+		RTE_ETH_RSS_NONFRAG_IPV4_UDP    |	\
+		RTE_ETH_RSS_NONFRAG_IPV4_SCTP   |	\
+		RTE_ETH_RSS_NONFRAG_IPV4_OTHER  |	\
+		RTE_ETH_RSS_IPV6                |	\
+		RTE_ETH_RSS_FRAG_IPV6           |	\
+		RTE_ETH_RSS_NONFRAG_IPV6_TCP    |	\
+		RTE_ETH_RSS_NONFRAG_IPV6_UDP    |	\
+		RTE_ETH_RSS_NONFRAG_IPV6_SCTP   |	\
+		RTE_ETH_RSS_NONFRAG_IPV6_OTHER  |	\
+		RTE_ETH_RSS_L2_PAYLOAD)
+
 #define CPFL_ADAPTER_NAME_LEN	(PCI_PRI_STR_SIZE + 1)
 
 #define CPFL_ALARM_INTERVAL	50000 /* us */