From patchwork Fri Dec 23 01:55:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Mingxia" X-Patchwork-Id: 121329 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ECD94A0093; Fri, 23 Dec 2022 03:53:26 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 775D642D30; Fri, 23 Dec 2022 03:52:17 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id E069442D5D for ; Fri, 23 Dec 2022 03:52:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671763936; x=1703299936; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HvVrIh2n47FGFez5kPxuf71Yg5siVf+PK8TFhmiff9M=; b=Vu+Lug4e5mpm6wYAzqZFuVBd4CKWL9iO2j+QIBAySVHMnvSR4aMmkkiE Yqfz10Bvd0Ovh8LuJkPwovBk1Tdi2ErvVk4njMglD0rsWxquzPTA4WzGC lEwoqpjB2aQwxh3bnm73jr0+/WmmhVGidCNfJkxXAqapZO7Ug4hTNZuJ6 8YuAyAxHCZ7fsYon2P2mlxHA3sIkDUwcjVzzICgz7uRUbPVUH8TnxN4ja taaow3lP01pe4viHmaXnAmHZ/vU6Pt2VTq8Hun+QToks1gUdWU0e5OnDJ bZAlRa4A8J/nuV0PGNZopZRhgi6GcMNqwCLng482LEyGXuZhMpfuoN34/ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10569"; a="321467129" X-IronPort-AV: E=Sophos;i="5.96,267,1665471600"; d="scan'208";a="321467129" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Dec 2022 18:52:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10569"; a="629707197" X-IronPort-AV: E=Sophos;i="5.96,267,1665471600"; d="scan'208";a="629707197" Received: from dpdk-mingxial-01.sh.intel.com ([10.67.119.112]) by orsmga006.jf.intel.com with ESMTP; 22 Dec 2022 18:52:13 -0800 From: Mingxia Liu To: dev@dpdk.org Cc: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com, Mingxia Liu , Wenjun Wu Subject: [PATCH 17/21] net/cpfl: add AVX512 data path for split queue model Date: Fri, 23 Dec 2022 01:55:54 +0000 Message-Id: <20221223015558.3143279-18-mingxia.liu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221223015558.3143279-1-mingxia.liu@intel.com> References: <20221223015558.3143279-1-mingxia.liu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support of AVX512 data path for split queue model. Signed-off-by: Wenjun Wu Signed-off-by: Mingxia Liu --- drivers/net/cpfl/cpfl_rxtx.c | 25 +++++++++++++++++++++++++ drivers/net/cpfl/cpfl_rxtx_vec_common.h | 14 +++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index efe13775e6..9277249704 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -772,6 +772,20 @@ cpfl_set_rx_function(struct rte_eth_dev *dev) #ifdef RTE_ARCH_X86 if (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { +#ifdef RTE_ARCH_X86 + if (vport->rx_vec_allowed) { + for (i = 0; i < dev->data->nb_tx_queues; i++) { + rxq = dev->data->rx_queues[i]; + (void)idpf_splitq_rx_vec_setup(rxq); + } +#ifdef CC_AVX512_SUPPORT + if (vport->rx_use_avx512) { + dev->rx_pkt_burst = idpf_splitq_recv_pkts_avx512; + return; + } +#endif + } +#endif dev->rx_pkt_burst = idpf_splitq_recv_pkts; } else { if (vport->rx_vec_allowed) { @@ -833,6 +847,17 @@ cpfl_set_tx_function(struct rte_eth_dev *dev) #endif /* RTE_ARCH_X86 */ if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) { +#ifdef RTE_ARCH_X86 + if (vport->tx_vec_allowed) { +#ifdef CC_AVX512_SUPPORT + if (vport->tx_use_avx512) { + dev->tx_pkt_burst = idpf_splitq_xmit_pkts_avx512; + dev->tx_pkt_prepare = idpf_prep_pkts; + return; + } +#endif + } +#endif dev->tx_pkt_burst = idpf_splitq_xmit_pkts; dev->tx_pkt_prepare = idpf_prep_pkts; } else { diff --git a/drivers/net/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/cpfl/cpfl_rxtx_vec_common.h index a411cf6a32..fc3ace89dd 100644 --- a/drivers/net/cpfl/cpfl_rxtx_vec_common.h +++ b/drivers/net/cpfl/cpfl_rxtx_vec_common.h @@ -63,15 +63,27 @@ cpfl_tx_vec_queue_default(struct idpf_tx_queue *txq) return CPFL_VECTOR_PATH; } +static inline int +cpfl_rx_splitq_vec_default(struct idpf_rx_queue *rxq) +{ + if (rxq->bufq2->rx_buf_len < rxq->max_pkt_len) + return -1; + + return CPFL_VECTOR_PATH; +} + static inline int cpfl_rx_vec_dev_check_default(struct rte_eth_dev *dev) { + struct idpf_vport *vport = dev->data->dev_private; struct idpf_rx_queue *rxq; int i, ret = 0; for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; - ret = (cpfl_rx_vec_queue_default(rxq)); + ret = cpfl_rx_vec_queue_default(rxq) || + (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT && + cpfl_rx_splitq_vec_default(rxq)); if (ret < 0) return -1; }