From patchwork Thu Jan 12 10:47:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Volodymyr Fialko X-Patchwork-Id: 121893 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BC312423B5; Thu, 12 Jan 2023 11:47:59 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B26E542D36; Thu, 12 Jan 2023 11:47:59 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9C4F640156 for ; Thu, 12 Jan 2023 11:47:57 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30C9dqJC021100 for ; Thu, 12 Jan 2023 02:47:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=qeMTviC6vX39DIpPpyQYAYo9uLlSn0y90heLobGBbLs=; b=ZBLjpQ/3h/4a9RslZWIm8D8tuOpkHWz4bJy6nlGTurU73gmBXny4qtw/EmdSFPwW//7P KaFs3BiiRnru9Qd9ljOzJ3XHEOgl5g48jsDtOnEJEmI/zY+1sKKzL7IwXgTqwlzRoQe+ KlwqmnVS1wZZI6+0K5z7uUIc1j5aNGHcGJRxwfLEWeIW8Qotaf+DqwqyjMjROdDb/qzH H8QNAQEks8e0Kf13deeH+ySadPLBJshkuq9DEkWPY/sEEURnhFaFBv2RKj9H9hXeqta8 uhzsKVrIHuRbM9n3KlsVlg54vuveS/rSJE1wl0dvJha3soacw9kz0pMMT7cc1n5bMw3B Vg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3n1k56ykbb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 12 Jan 2023 02:47:56 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 12 Jan 2023 02:47:54 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Thu, 12 Jan 2023 02:47:54 -0800 Received: from cavium-DT10.. (unknown [10.28.34.39]) by maili.marvell.com (Postfix) with ESMTP id AD4EF3F7073; Thu, 12 Jan 2023 02:47:50 -0800 (PST) From: Volodymyr Fialko To: , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , "Nithin Dabilpuram" , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Volodymyr Fialko Subject: [PATCH v2 3/3] crypto/cnxk: add support for SHAKE hash Date: Thu, 12 Jan 2023 11:47:33 +0100 Message-ID: <20230112104733.1835722-4-vfialko@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112104733.1835722-1-vfialko@marvell.com> References: <20230104143815.603524-1-vfialko@marvell.com> <20230112104733.1835722-1-vfialko@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: ips98lMpP4LiKu4rt3eonoUIFSz-N6Bh X-Proofpoint-GUID: ips98lMpP4LiKu4rt3eonoUIFSz-N6Bh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-12_06,2023-01-12_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for SHAKE hash and hmac operations Signed-off-by: Volodymyr Fialko --- doc/guides/cryptodevs/cnxk.rst | 2 + doc/guides/cryptodevs/features/cn10k.ini | 2 + doc/guides/cryptodevs/features/cn9k.ini | 2 + drivers/common/cnxk/roc_se.h | 4 +- drivers/crypto/cnxk/cnxk_cryptodev.h | 2 +- .../crypto/cnxk/cnxk_cryptodev_capabilities.c | 40 +++++++++++++++++++ drivers/crypto/cnxk/cnxk_se.h | 15 +++++++ 7 files changed, 64 insertions(+), 3 deletions(-) diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst index 9b01e04e5f..3c2e38fefd 100644 --- a/doc/guides/cryptodevs/cnxk.rst +++ b/doc/guides/cryptodevs/cnxk.rst @@ -67,6 +67,8 @@ Hash algorithms: * ``RTE_CRYPTO_AUTH_SHA3_384_HMAC`` * ``RTE_CRYPTO_AUTH_SHA3_512`` * ``RTE_CRYPTO_AUTH_SHA3_512_HMAC`` +* ``RTE_CRYPTO_AUTH_SHAKE_128`` +* ``RTE_CRYPTO_AUTH_SHAKE_256`` * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2`` * ``RTE_CRYPTO_AUTH_ZUC_EIA3`` * ``RTE_CRYPTO_AUTH_AES_CMAC`` diff --git a/doc/guides/cryptodevs/features/cn10k.ini b/doc/guides/cryptodevs/features/cn10k.ini index 44b61663fc..162d1a25ca 100644 --- a/doc/guides/cryptodevs/features/cn10k.ini +++ b/doc/guides/cryptodevs/features/cn10k.ini @@ -71,6 +71,8 @@ SHA3_384 = Y SHA3_384 HMAC = Y SHA3_512 = Y SHA3_512 HMAC = Y +SHAKE_128 = Y +SHAKE_256 = Y ; ; Supported AEAD algorithms of 'cn10k' crypto driver. diff --git a/doc/guides/cryptodevs/features/cn9k.ini b/doc/guides/cryptodevs/features/cn9k.ini index e7b287db26..bbed4b2e23 100644 --- a/doc/guides/cryptodevs/features/cn9k.ini +++ b/doc/guides/cryptodevs/features/cn9k.ini @@ -72,6 +72,8 @@ SHA3_384 = Y SHA3_384 HMAC = Y SHA3_512 = Y SHA3_512 HMAC = Y +SHAKE_128 = Y +SHAKE_256 = Y ; ; Supported AEAD algorithms of 'cn9k' crypto driver. diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h index e9415f21a5..6758142214 100644 --- a/drivers/common/cnxk/roc_se.h +++ b/drivers/common/cnxk/roc_se.h @@ -85,8 +85,8 @@ typedef enum { ROC_SE_SHA3_SHA256 = 11, ROC_SE_SHA3_SHA384 = 12, ROC_SE_SHA3_SHA512 = 13, - ROC_SE_SHA3_SHAKE256 = 14, - ROC_SE_SHA3_SHAKE512 = 15, + ROC_SE_SHA3_SHAKE128 = 14, + ROC_SE_SHA3_SHAKE256 = 15, /* These are only for software use */ ROC_SE_ZUC_EIA3 = 0x90, diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h index 8241ee67d0..dd7dd3bc3a 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -10,7 +10,7 @@ #include "roc_cpt.h" -#define CNXK_CPT_MAX_CAPS 45 +#define CNXK_CPT_MAX_CAPS 47 #define CNXK_SEC_CRYPTO_MAX_CAPS 16 #define CNXK_SEC_MAX_CAPS 9 #define CNXK_AE_EC_ID_MAX 8 diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c index b2197a12be..d2ae4b5bff 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c @@ -498,6 +498,46 @@ static const struct rte_cryptodev_capabilities caps_sha3[] = { }, } }, } }, + { /* SHAKE_128 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + {.auth = { + .algo = RTE_CRYPTO_AUTH_SHAKE_128, + .block_size = 168, + .key_size = { + .min = 0, + .max = 0, + .increment = 0 + }, + .digest_size = { + .min = 1, + .max = 255, + .increment = 1 + }, + }, } + }, } + }, + { /* SHAKE_256 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + {.auth = { + .algo = RTE_CRYPTO_AUTH_SHAKE_256, + .block_size = 136, + .key_size = { + .min = 0, + .max = 0, + .increment = 0 + }, + .digest_size = { + .min = 1, + .max = 255, + .increment = 1 + }, + }, } + }, } + }, }; static const struct rte_cryptodev_capabilities caps_chacha20[] = { diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h index 0e5d2dde39..c16027ec75 100644 --- a/drivers/crypto/cnxk/cnxk_se.h +++ b/drivers/crypto/cnxk/cnxk_se.h @@ -192,6 +192,13 @@ cpt_mac_len_verify(struct rte_crypto_auth_xform *auth) case RTE_CRYPTO_AUTH_SHA3_512_HMAC: ret = (mac_len <= 64) ? 0 : -1; break; + /* SHAKE itself doesn't have limitation of digest length, + * but in microcode size of length field is limited to 8 bits + */ + case RTE_CRYPTO_AUTH_SHAKE_128: + case RTE_CRYPTO_AUTH_SHAKE_256: + ret = (mac_len <= UINT8_MAX) ? 0 : -1; + break; case RTE_CRYPTO_AUTH_NULL: ret = 0; break; @@ -1949,6 +1956,14 @@ fill_sess_auth(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess) is_sha3 = 1; auth_type = ROC_SE_SHA3_SHA512; break; + case RTE_CRYPTO_AUTH_SHAKE_128: + is_sha3 = 1; + auth_type = ROC_SE_SHA3_SHAKE128; + break; + case RTE_CRYPTO_AUTH_SHAKE_256: + is_sha3 = 1; + auth_type = ROC_SE_SHA3_SHAKE256; + break; case RTE_CRYPTO_AUTH_MD5_HMAC: case RTE_CRYPTO_AUTH_MD5: auth_type = ROC_SE_MD5_TYPE;