diff mbox series

[RFC,6/6] config/arm: add AMD CDX

Message ID 20230124140746.594066-7-nipun.gupta@amd.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series add support for CDX bus |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation fail Compilation issues
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing fail Unit Testing FAIL
ci/intel-Testing fail Testing issues

Commit Message

Gupta, Nipun Jan. 24, 2023, 2:07 p.m. UTC 
  Adding support for AMD CDX devices

Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
---
 config/arm/arm64_cdx_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build         | 15 +++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 config/arm/arm64_cdx_linux_gcc
diff mbox series

Patch

diff --git a/config/arm/arm64_cdx_linux_gcc b/config/arm/arm64_cdx_linux_gcc
new file mode 100644
index 0000000000..8e6d619dae
--- /dev/null
+++ b/config/arm/arm64_cdx_linux_gcc
@@ -0,0 +1,17 @@ 
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-ar'
+as = 'aarch64-linux-gnu-as'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'cdx'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 6442ec9596..76806b2820 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -63,6 +63,7 @@  part_number_config_arm = {
     '0xd09': {'compiler_options':  ['-mcpu=cortex-a73']},
     '0xd0a': {'compiler_options':  ['-mcpu=cortex-a75']},
     '0xd0b': {'compiler_options':  ['-mcpu=cortex-a76']},
+    '0xd42': {'compiler_options':  ['-mcpu=cortex-a78']},
     '0xd0c': {
         'march': 'armv8.2-a',
         'march_features': ['crypto'],
@@ -302,6 +303,18 @@  soc_bluefield = {
     'numa': false
 }
 
+soc_cdx = {
+    'description': 'AMD CDX',
+    'implementer': '0x41',
+    'part_number': '0xd42',
+    'flags': [
+        ['RTE_MACHINE', '"cdx"'],
+        ['RTE_MAX_LCORE', 16],
+        ['RTE_MAX_NUMA_NODES', 1]
+    ],
+    'numa': false
+}
+
 soc_centriq2400 = {
     'description': 'Qualcomm Centriq 2400',
     'implementer': '0x51',
@@ -448,6 +461,7 @@  generic:         Generic un-optimized build for armv8 aarch64 execution mode.
 generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
 armada:          Marvell ARMADA
 bluefield:       NVIDIA BlueField
+cdx:             AMD CDX
 centriq2400:     Qualcomm Centriq 2400
 cn9k:            Marvell OCTEON 9
 cn10k:           Marvell OCTEON 10
@@ -474,6 +488,7 @@  socs = {
     'generic_aarch32': soc_generic_aarch32,
     'armada': soc_armada,
     'bluefield': soc_bluefield,
+    'cdx': soc_cdx,
     'centriq2400': soc_centriq2400,
     'cn9k': soc_cn9k,
     'cn10k' : soc_cn10k,