diff mbox series

[v3,2/4] crypto/cnxk: restructure for cn10k datapath

Message ID 20230125113126.2860273-2-rbhansali@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v3,1/4] common/cnxk: restructure for cn10k datapath |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Rahul Bhansali Jan. 25, 2023, 11:31 a.m. UTC 
  From: Anoob Joseph <anoobj@marvell.com>

Inclusion of roc_api.h in all files would mean any change in RoC API
would result in recompilation of all cnxk drivers. Address this issue in
crypto_cnxk drivers by including only the headers that are required.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
Changes in v3: Reorder patch in series for compilation fix.
Changes in v2: Updated git comment subject.

 drivers/common/cnxk/cnxk_security.h       |  3 +-
 drivers/common/cnxk/hw/cpt.h              | 30 +++++++++++++++++++
 drivers/common/cnxk/roc_ae_fpm_tables.h   |  2 +-
 drivers/common/cnxk/roc_cpt.h             |  6 +++-
 drivers/common/cnxk/roc_ie_ot.h           |  2 ++
 drivers/common/cnxk/roc_io_generic.h      |  2 ++
 drivers/common/cnxk/roc_mbox.h            | 35 ++---------------------
 drivers/common/cnxk/roc_model.h           |  2 ++
 drivers/common/cnxk/roc_npa.c             |  2 +-
 drivers/common/cnxk/roc_npa.h             | 13 +++++++++
 drivers/common/cnxk/roc_platform.h        |  7 +++++
 drivers/common/cnxk/roc_sso.h             |  2 ++
 drivers/common/cnxk/roc_tim.h             |  2 ++
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 11 +++++--
 drivers/crypto/cnxk/cn10k_ipsec.h         |  3 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |  9 ++++++
 drivers/crypto/cnxk/cn9k_ipsec_la_ops.h   |  2 ++
 drivers/crypto/cnxk/cnxk_ae.h             |  3 +-
 drivers/crypto/cnxk/cnxk_cryptodev.c      |  1 +
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  |  2 ++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  7 ++++-
 drivers/crypto/cnxk/cnxk_ipsec.h          |  4 ++-
 drivers/crypto/cnxk/cnxk_sg.h             |  2 ++
 drivers/event/cnxk/cnxk_eventdev.c        |  2 ++
 drivers/event/cnxk/cnxk_eventdev.h        |  5 +++-
 drivers/event/cnxk/cnxk_tim_evdev.c       |  2 ++
 drivers/event/cnxk/cnxk_tim_evdev.h       |  5 +++-
 drivers/event/cnxk/cnxk_worker.h          |  6 ++++
 drivers/net/octeon_ep/meson.build         |  2 ++
 29 files changed, 130 insertions(+), 44 deletions(-)

--
2.25.1

Comments

Jerin Jacob Feb. 7, 2023, 12:13 p.m. UTC | #1 
On Wed, Jan 25, 2023 at 5:02 PM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> From: Anoob Joseph <anoobj@marvell.com>
>
> Inclusion of roc_api.h in all files would mean any change in RoC API
> would result in recompilation of all cnxk drivers. Address this issue in
> crypto_cnxk drivers by including only the headers that are required.
>
> Signed-off-by: Anoob Joseph <anoobj@marvell.com>
> ---
> Changes in v3: Reorder patch in series for compilation fix.
> Changes in v2: Updated git comment subject.

>  /* SSO Operations */
> diff --git a/drivers/net/octeon_ep/meson.build b/drivers/net/octeon_ep/meson.build
> index a267b60290..a3bfed09ee 100644
> --- a/drivers/net/octeon_ep/meson.build
> +++ b/drivers/net/octeon_ep/meson.build
> @@ -2,6 +2,8 @@
>  # Copyright(C) 2021 Marvell.
>  #
>
> +deps += ['common_cnxk']


This changes is not needed as octeon_ep driver is not using roc_ APIs.
Have updated the patch with above change

Series applied to dpdk-next-net-mrvl/for-next-net. Thanks


> +
>  sources = files(
>          'otx_ep_ethdev.c',
>          'otx_ep_rxtx.c',
> --
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/common/cnxk/cnxk_security.h b/drivers/common/cnxk/cnxk_security.h
index 4e477ec53f..2277ce9144 100644
--- a/drivers/common/cnxk/cnxk_security.h
+++ b/drivers/common/cnxk/cnxk_security.h
@@ -7,7 +7,8 @@ 
 #include <rte_crypto.h>
 #include <rte_security.h>

-#include "roc_api.h"
+#include "roc_ie_on.h"
+#include "roc_ie_ot.h"

 /* Response length calculation data */
 struct cnxk_ipsec_outb_rlens {
diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 30f2af3cd9..d378a4eadd 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -5,6 +5,8 @@ 
 #ifndef __CPT_HW_H__
 #define __CPT_HW_H__

+#include "roc_platform.h"
+
 /* Register offsets */

 #define CPT_COMP_NOT_DONE (0x0ull)
@@ -47,8 +49,36 @@ 
 #define CPT_AF_LFX_CTL(a)  (0x27000ull | (uint64_t)(a) << 3)
 #define CPT_AF_LFX_CTL2(a) (0x29000ull | (uint64_t)(a) << 3)

+enum cpt_eng_type {
+	CPT_ENG_TYPE_AE = 1,
+	CPT_ENG_TYPE_SE = 2,
+	CPT_ENG_TYPE_IE = 3,
+	CPT_MAX_ENG_TYPES,
+};
+
 /* Structures definitions */

+/* CPT HW capabilities */
+union cpt_eng_caps {
+	uint64_t __io u;
+	struct {
+		uint64_t __io reserved_0_4 : 5;
+		uint64_t __io mul : 1;
+		uint64_t __io sha1_sha2 : 1;
+		uint64_t __io chacha20 : 1;
+		uint64_t __io zuc_snow3g : 1;
+		uint64_t __io sha3 : 1;
+		uint64_t __io aes : 1;
+		uint64_t __io kasumi : 1;
+		uint64_t __io des : 1;
+		uint64_t __io crc : 1;
+		uint64_t __io mmul : 1;
+		uint64_t __io reserved_15_33 : 19;
+		uint64_t __io pdcp_chain : 1;
+		uint64_t __io reserved_35_63 : 29;
+	};
+};
+
 union cpt_lf_ctl {
 	uint64_t u;
 	struct cpt_lf_ctl_s {
diff --git a/drivers/common/cnxk/roc_ae_fpm_tables.h b/drivers/common/cnxk/roc_ae_fpm_tables.h
index 1cc5b023f2..98b00bcf14 100644
--- a/drivers/common/cnxk/roc_ae_fpm_tables.h
+++ b/drivers/common/cnxk/roc_ae_fpm_tables.h
@@ -5,7 +5,7 @@ 
 #ifndef _ROC_AE_FPM_TABLES_H_
 #define _ROC_AE_FPM_TABLES_H_

-#include "roc_api.h"
+#include "roc_platform.h"

 int __roc_api roc_ae_fpm_get(uint64_t *tbl);
 void __roc_api roc_ae_fpm_put(void);
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 96d066dee3..2fa1abad16 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -5,7 +5,11 @@ 
 #ifndef _ROC_CPT_H_
 #define _ROC_CPT_H_

-#include "roc_api.h"
+#include "hw/cpt.h"
+
+#include "roc_platform.h"
+
+struct nix_inline_ipsec_cfg;

 #define ROC_AE_CPT_BLOCK_TYPE1 0
 #define ROC_AE_CPT_BLOCK_TYPE2 1
diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index e53ee28aff..b7fcdf9ba7 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -5,6 +5,8 @@ 
 #ifndef __ROC_IE_OT_H__
 #define __ROC_IE_OT_H__

+#include "roc_platform.h"
+
 /* CN10K IPSEC opcodes */
 #define ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x28UL
 #define ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC  0x29UL
diff --git a/drivers/common/cnxk/roc_io_generic.h b/drivers/common/cnxk/roc_io_generic.h
index 42764455cc..843c18c48c 100644
--- a/drivers/common/cnxk/roc_io_generic.h
+++ b/drivers/common/cnxk/roc_io_generic.h
@@ -5,6 +5,8 @@ 
 #ifndef _ROC_IO_GENERIC_H_
 #define _ROC_IO_GENERIC_H_

+#include "roc_platform.h"
+
 #define ROC_LMT_BASE_ID_GET(lmt_addr, lmt_id)	  (lmt_id = 0)
 #define ROC_LMT_CPT_BASE_ID_GET(lmt_addr, lmt_id) (lmt_id = 0)

diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index c1769567b5..0bddb1ddfd 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -9,10 +9,9 @@ 
 #include <stdbool.h>
 #include <stdint.h>

-/* Device memory does not support unaligned access, instruct compiler to
- * not optimize the memory access when working with mailbox memory.
- */
-#define __io volatile
+#include "hw/cpt.h"
+
+#include "roc_platform.h"

 /* Header which precedes all mbox messages */
 struct mbox_hdr {
@@ -1510,34 +1509,6 @@  struct cpt_rx_inline_lf_cfg_msg {
 	uint32_t __io reserved;
 };

-enum cpt_eng_type {
-	CPT_ENG_TYPE_AE = 1,
-	CPT_ENG_TYPE_SE = 2,
-	CPT_ENG_TYPE_IE = 3,
-	CPT_MAX_ENG_TYPES,
-};
-
-/* CPT HW capabilities */
-union cpt_eng_caps {
-	uint64_t __io u;
-	struct {
-		uint64_t __io reserved_0_4 : 5;
-		uint64_t __io mul : 1;
-		uint64_t __io sha1_sha2 : 1;
-		uint64_t __io chacha20 : 1;
-		uint64_t __io zuc_snow3g : 1;
-		uint64_t __io sha3 : 1;
-		uint64_t __io aes : 1;
-		uint64_t __io kasumi : 1;
-		uint64_t __io des : 1;
-		uint64_t __io crc : 1;
-		uint64_t __io mmul : 1;
-		uint64_t __io reserved_15_33 : 19;
-		uint64_t __io pdcp_chain : 1;
-		uint64_t __io reserved_35_63 : 29;
-	};
-};
-
 struct cpt_caps_rsp_msg {
 	struct mbox_msghdr hdr;
 	uint16_t __io cpt_pf_drv_version;
diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h
index 848609eb35..081c03915c 100644
--- a/drivers/common/cnxk/roc_model.h
+++ b/drivers/common/cnxk/roc_model.h
@@ -7,6 +7,8 @@ 

 #include <stdbool.h>

+#include "roc_bits.h"
+
 extern struct roc_model *roc_model;

 struct roc_model {
diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index 1a5debcf76..69c3d8d250 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -875,8 +875,8 @@  npa_dev_fini(struct npa_lf *lf)
 int
 npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev)
 {
+	uint16_t npa_msixoff = 0;
 	struct idev_cfg *idev;
-	uint16_t npa_msixoff;
 	struct npa_lf *lf;
 	int rc;

diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h
index 8f74512032..dd588b0322 100644
--- a/drivers/common/cnxk/roc_npa.h
+++ b/drivers/common/cnxk/roc_npa.h
@@ -5,6 +5,19 @@ 
 #ifndef _ROC_NPA_H_
 #define _ROC_NPA_H_

+#include <stdint.h>
+
+#include "hw/npa.h"
+
+#include "roc_bits.h"
+#include "roc_constants.h"
+#if defined(__aarch64__)
+#include "roc_io.h"
+#else
+#include "roc_io_generic.h"
+#endif
+#include "roc_npa_dp.h"
+
 #define ROC_AURA_OP_LIMIT_MASK (BIT_ULL(36) - 1)

 #define ROC_NPA_MAX_BLOCK_SZ		   (128 * 1024)
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 8ba28e69fa..f916a5dc08 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -293,6 +293,13 @@  extern int cnxk_logtype_ree;
 }
 #endif

+/* Device memory does not support unaligned access, instruct compiler to
+ * not optimize the memory access when working with mailbox memory.
+ */
+#ifndef __io
+#define __io volatile
+#endif
+
 __rte_internal
 int roc_plt_init(void);

diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
index fc6e71332f..47574a4e02 100644
--- a/drivers/common/cnxk/roc_sso.h
+++ b/drivers/common/cnxk/roc_sso.h
@@ -5,6 +5,8 @@ 
 #ifndef _ROC_SSO_H_
 #define _ROC_SSO_H_

+#include "hw/ssow.h"
+
 struct roc_sso_hwgrp_qos {
 	uint16_t hwgrp;
 	uint8_t xaq_prcnt;
diff --git a/drivers/common/cnxk/roc_tim.h b/drivers/common/cnxk/roc_tim.h
index 392732eae2..7dc9ae0a61 100644
--- a/drivers/common/cnxk/roc_tim.h
+++ b/drivers/common/cnxk/roc_tim.h
@@ -5,6 +5,8 @@ 
 #ifndef _ROC_TIM_H_
 #define _ROC_TIM_H_

+#include "roc_platform.h"
+
 enum roc_tim_clk_src {
 	ROC_TIM_CLK_SRC_10NS = 0,
 	ROC_TIM_CLK_SRC_GPIO,
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 017b0d8907..ef0a4ea05a 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -7,6 +7,15 @@ 
 #include <rte_event_crypto_adapter.h>
 #include <rte_ip.h>

+#include "roc_cpt.h"
+#if defined(__aarch64__)
+#include "roc_io.h"
+#else
+#include "roc_io_generic.h"
+#endif
+#include "roc_sso.h"
+#include "roc_sso_dp.h"
+
 #include "cn10k_cryptodev.h"
 #include "cn10k_cryptodev_ops.h"
 #include "cn10k_ipsec.h"
@@ -17,8 +26,6 @@ 
 #include "cnxk_eventdev.h"
 #include "cnxk_se.h"

-#include "roc_api.h"
-
 #define PKTS_PER_LOOP	32
 #define PKTS_PER_STEORL 16

diff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h
index 23d7a4fac4..8a93d74062 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec.h
@@ -8,7 +8,8 @@ 
 #include <rte_security.h>
 #include <rte_security_driver.h>

-#include "roc_api.h"
+#include "roc_constants.h"
+#include "roc_ie_ot.h"

 #include "cnxk_ipsec.h"

diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index e3784e34c9..99734bf11d 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -8,6 +8,15 @@ 
 #include <rte_ip.h>
 #include <rte_vect.h>

+#include "roc_cpt.h"
+#if defined(__aarch64__)
+#include "roc_io.h"
+#else
+#include "roc_io_generic.h"
+#endif
+#include "roc_sso.h"
+#include "roc_sso_dp.h"
+
 #include "cn9k_cryptodev.h"
 #include "cn9k_cryptodev_ops.h"
 #include "cn9k_ipsec.h"
diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
index 21725404cb..9df41bf65d 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
@@ -9,6 +9,8 @@ 
 #include <rte_esp.h>
 #include <rte_security.h>

+#include "roc_ie.h"
+
 #include "cn9k_ipsec.h"
 #include "cnxk_cryptodev_ops.h"
 #include "cnxk_security_ar.h"
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index adf719da73..698c10129e 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -9,7 +9,8 @@ 
 #include <rte_crypto_asym.h>
 #include <rte_malloc.h>

-#include "roc_api.h"
+#include "roc_ae.h"
+
 #include "cnxk_cryptodev_ops.h"

 struct cnxk_ae_sess {
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.c b/drivers/crypto/cnxk/cnxk_cryptodev.c
index 35635f7831..a86b1cb60f 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev.c
@@ -5,6 +5,7 @@ 
 #include <rte_cryptodev.h>

 #include "roc_cpt.h"
+#include "roc_model.h"

 #include "cnxk_cryptodev.h"

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 2e845afce9..4640edf7ff 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -6,7 +6,9 @@ 
 #include <cryptodev_pmd.h>
 #include <rte_errno.h>

+#include "roc_ae_fpm_tables.h"
 #include "roc_cpt.h"
+#include "roc_ie_on.h"

 #include "cnxk_ae.h"
 #include "cnxk_cryptodev.h"
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index f91ad368ea..0dfe73c976 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -8,7 +8,12 @@ 
 #include <cryptodev_pmd.h>
 #include <rte_event_crypto_adapter.h>

-#include "roc_api.h"
+#include "hw/cpt.h"
+
+#include "roc_constants.h"
+#include "roc_cpt.h"
+#include "roc_cpt_sg.h"
+#include "roc_se.h"

 #define CNXK_CPT_MIN_HEADROOM_REQ	 32
 #define CNXK_CPT_MIN_TAILROOM_REQ	 102
diff --git a/drivers/crypto/cnxk/cnxk_ipsec.h b/drivers/crypto/cnxk/cnxk_ipsec.h
index 0c471b2cfe..4d3ee23f61 100644
--- a/drivers/crypto/cnxk/cnxk_ipsec.h
+++ b/drivers/crypto/cnxk/cnxk_ipsec.h
@@ -7,7 +7,9 @@ 
 #include <rte_security.h>
 #include <rte_security_driver.h>

-#include "roc_api.h"
+#include "roc_cpt.h"
+#include "roc_ie_on.h"
+#include "roc_ie_ot.h"

 extern struct rte_security_ops cnxk_sec_ops;

diff --git a/drivers/crypto/cnxk/cnxk_sg.h b/drivers/crypto/cnxk/cnxk_sg.h
index 1dfca261cf..ead2886e99 100644
--- a/drivers/crypto/cnxk/cnxk_sg.h
+++ b/drivers/crypto/cnxk/cnxk_sg.h
@@ -5,6 +5,8 @@ 
 #ifndef _CNXK_SG_H_
 #define _CNXK_SG_H_

+#include "roc_cpt_sg.h"
+
 static __rte_always_inline uint32_t
 fill_sg_comp(struct roc_sglist_comp *list, uint32_t i, phys_addr_t dma_addr, uint32_t size)
 {
diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c
index db62d32a81..d7819a9298 100644
--- a/drivers/event/cnxk/cnxk_eventdev.c
+++ b/drivers/event/cnxk/cnxk_eventdev.c
@@ -2,6 +2,8 @@ 
  * Copyright(C) 2021 Marvell.
  */

+#include "roc_npa.h"
+
 #include "cnxk_eventdev.h"

 void
diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index 738e335ea4..a3b4fef9d0 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -19,7 +19,10 @@ 

 #include <eventdev_pmd_pci.h>

-#include "roc_api.h"
+#include "hw/sso.h"
+
+#include "roc_platform.h"
+#include "roc_sso.h"

 #include "cnxk_tim_evdev.h"

diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c
index 5dd79cbd47..3e6ff2b12f 100644
--- a/drivers/event/cnxk/cnxk_tim_evdev.c
+++ b/drivers/event/cnxk/cnxk_tim_evdev.c
@@ -4,6 +4,8 @@ 

 #include <math.h>

+#include "roc_npa.h"
+
 #include "cnxk_eventdev.h"
 #include "cnxk_tim_evdev.h"

diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h
index 0c192346c7..c4ce74bfa5 100644
--- a/drivers/event/cnxk/cnxk_tim_evdev.h
+++ b/drivers/event/cnxk/cnxk_tim_evdev.h
@@ -16,7 +16,10 @@ 
 #include <rte_memzone.h>
 #include <rte_reciprocal.h>

-#include "roc_api.h"
+#include "hw/tim.h"
+
+#include "roc_model.h"
+#include "roc_tim.h"

 #define NSECPERSEC		 1E9
 #define USECPERSEC		 1E6
diff --git a/drivers/event/cnxk/cnxk_worker.h b/drivers/event/cnxk/cnxk_worker.h
index 5e5e96b1ec..0756e223f7 100644
--- a/drivers/event/cnxk/cnxk_worker.h
+++ b/drivers/event/cnxk/cnxk_worker.h
@@ -5,6 +5,12 @@ 
 #ifndef __CNXK_WORKER_H__
 #define __CNXK_WORKER_H__

+#if defined(__aarch64__)
+#include "roc_io.h"
+#else
+#include "roc_io_generic.h"
+#endif
+
 #include "cnxk_eventdev.h"

 /* SSO Operations */
diff --git a/drivers/net/octeon_ep/meson.build b/drivers/net/octeon_ep/meson.build
index a267b60290..a3bfed09ee 100644
--- a/drivers/net/octeon_ep/meson.build
+++ b/drivers/net/octeon_ep/meson.build
@@ -2,6 +2,8 @@ 
 # Copyright(C) 2021 Marvell.
 #

+deps += ['common_cnxk']
+
 sources = files(
         'otx_ep_ethdev.c',
         'otx_ep_rxtx.c',