From patchwork Thu Feb 2 07:55:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 122884 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A330B41BAA; Thu, 2 Feb 2023 08:55:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8E2C742B7E; Thu, 2 Feb 2023 08:55:20 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 7AAB6406A2 for ; Thu, 2 Feb 2023 08:55:18 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3127FWaw007914 for ; Wed, 1 Feb 2023 23:55:17 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=8NumS7yJ9g8hClyorbymA9ynhcYZ9Y3xFnBQOAcXFQc=; b=kh1l2mhT1Cm9iPIzHQMyjHkytQr9NeVz1hNP22IX+ndhah+FHHZguAyV52/v1ZQn8jWC IKHND93WS/8ZHwISssZDEgXPowb76eo/7KA5J2/r4b6C3Ym3hd5w8S43dqM3oe3SDs1S THwpIUkK0OWJu5oUQSAcECGZJY9LYQBonYrwHQHoGJWzYZnXPH7S/FgmGi+yNM0C/dRT qknyJh5GyLS7UNSlTMMoYMCXGOJb6mV0t4A0/+hG4DVyozzq53i5S5GH/hRBkb0TODD1 yugKV9EuFELkG05y01if5qFdqh8nStTwetfokA1H1Uds/ntmT4//uAvnjrSsrdy5UvUT wQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3nfjrj6v1s-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 01 Feb 2023 23:55:17 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 1 Feb 2023 23:55:14 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Wed, 1 Feb 2023 23:55:14 -0800 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.122]) by maili.marvell.com (Postfix) with ESMTP id 64E435B6926; Wed, 1 Feb 2023 23:55:12 -0800 (PST) From: To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Pavan Nikhilesh Subject: [PATCH] common/cnxk: remove unnecessary locks Date: Thu, 2 Feb 2023 13:25:09 +0530 Message-ID: <20230202075509.1698-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: aLeu43US7AdsZDrwesnEed8htJBAwgzs X-Proofpoint-GUID: aLeu43US7AdsZDrwesnEed8htJBAwgzs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-01_15,2023-01-31_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Remove unnecessary locks as locking is now taken care by mbox_get and mbox_put. Signed-off-by: Pavan Nikhilesh --- Depends-on: 26537 drivers/common/cnxk/roc_sso.c | 25 ------------------------- drivers/common/cnxk/roc_sso_priv.h | 1 - 2 files changed, 26 deletions(-) -- 2.25.1 diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index 9920d0c604..8f27c004a7 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -327,7 +327,6 @@ roc_sso_hws_stats_get(struct roc_sso *roc_sso, uint8_t hws, struct mbox *mbox; int rc; - plt_spinlock_lock(&sso->mbox_lock); mbox = mbox_get(dev->mbox); req_rsp = (struct sso_hws_stats *)mbox_alloc_msg_sso_hws_get_stats( mbox); @@ -354,7 +353,6 @@ roc_sso_hws_stats_get(struct roc_sso *roc_sso, uint8_t hws, stats->arbitration = req_rsp->arbitration; fail: mbox_put(mbox); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -368,7 +366,6 @@ roc_sso_hwgrp_stats_get(struct roc_sso *roc_sso, uint8_t hwgrp, struct mbox *mbox; int rc; - plt_spinlock_lock(&sso->mbox_lock); mbox = mbox_get(dev->mbox); req_rsp = (struct sso_grp_stats *)mbox_alloc_msg_sso_grp_get_stats( mbox); @@ -403,7 +400,6 @@ roc_sso_hwgrp_stats_get(struct roc_sso *roc_sso, uint8_t hwgrp, fail: mbox_put(mbox); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -427,7 +423,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos, struct mbox *mbox; int i, rc; - plt_spinlock_lock(&sso->mbox_lock); mbox = mbox_get(dev->mbox); for (i = 0; i < nb_qos; i++) { uint8_t iaq_prcnt = qos[i].iaq_prcnt; @@ -461,7 +456,6 @@ roc_sso_hwgrp_qos_config(struct roc_sso *roc_sso, struct roc_sso_hwgrp_qos *qos, rc = -EIO; fail: mbox_put(mbox); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -562,11 +556,9 @@ roc_sso_hwgrp_init_xaq_aura(struct roc_sso *roc_sso, uint32_t nb_xae) struct dev *dev = &sso->dev; int rc; - plt_spinlock_lock(&sso->mbox_lock); rc = sso_hwgrp_init_xaq_aura(dev, &roc_sso->xaq, nb_xae, roc_sso->xae_waes, roc_sso->xaq_buf_size, roc_sso->nb_hwgrp); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -600,9 +592,7 @@ roc_sso_hwgrp_free_xaq_aura(struct roc_sso *roc_sso, uint16_t nb_hwgrp) struct dev *dev = &sso->dev; int rc; - plt_spinlock_lock(&sso->mbox_lock); rc = sso_hwgrp_free_xaq_aura(dev, &roc_sso->xaq, nb_hwgrp); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -639,9 +629,7 @@ roc_sso_hwgrp_alloc_xaq(struct roc_sso *roc_sso, uint32_t npa_aura_id, struct dev *dev = &sso->dev; int rc; - plt_spinlock_lock(&sso->mbox_lock); rc = sso_hwgrp_alloc_xaq(dev, npa_aura_id, hwgrps); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -677,9 +665,7 @@ roc_sso_hwgrp_release_xaq(struct roc_sso *roc_sso, uint16_t hwgrps) struct dev *dev = &sso->dev; int rc; - plt_spinlock_lock(&sso->mbox_lock); rc = sso_hwgrp_release_xaq(dev, hwgrps); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -693,7 +679,6 @@ roc_sso_hwgrp_set_priority(struct roc_sso *roc_sso, uint16_t hwgrp, struct mbox *mbox; int rc = -ENOSPC; - plt_spinlock_lock(&sso->mbox_lock); mbox = mbox_get(dev->mbox); req = mbox_alloc_msg_sso_grp_set_priority(mbox); if (req == NULL) @@ -709,14 +694,12 @@ roc_sso_hwgrp_set_priority(struct roc_sso *roc_sso, uint16_t hwgrp, goto fail; } mbox_put(mbox); - plt_spinlock_unlock(&sso->mbox_lock); plt_sso_dbg("HWGRP %d weight %d affinity %d priority %d", hwgrp, weight, affinity, priority); return 0; fail: mbox_put(mbox); - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -732,7 +715,6 @@ roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t nb_hwgrp) if (!nb_hws || roc_sso->max_hws < nb_hws) return -ENOENT; - plt_spinlock_lock(&sso->mbox_lock); rc = sso_rsrc_attach(roc_sso, SSO_LF_TYPE_HWS, nb_hws); if (rc < 0) { plt_err("Unable to attach SSO HWS LFs"); @@ -775,7 +757,6 @@ roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t nb_hwgrp) goto sso_msix_fail; } - plt_spinlock_unlock(&sso->mbox_lock); roc_sso->nb_hwgrp = nb_hwgrp; roc_sso->nb_hws = nb_hws; @@ -789,7 +770,6 @@ roc_sso_rsrc_init(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t nb_hwgrp) hwgrp_atch_fail: sso_rsrc_detach(roc_sso, SSO_LF_TYPE_HWS); fail: - plt_spinlock_unlock(&sso->mbox_lock); return rc; } @@ -811,7 +791,6 @@ roc_sso_rsrc_fini(struct roc_sso *roc_sso) roc_sso->nb_hwgrp = 0; roc_sso->nb_hws = 0; - plt_spinlock_unlock(&sso->mbox_lock); } int @@ -830,7 +809,6 @@ roc_sso_dev_init(struct roc_sso *roc_sso) sso = roc_sso_to_sso_priv(roc_sso); memset(sso, 0, sizeof(*sso)); pci_dev = roc_sso->pci_dev; - plt_spinlock_init(&sso->mbox_lock); rc = dev_init(&sso->dev, pci_dev); if (rc < 0) { @@ -838,7 +816,6 @@ roc_sso_dev_init(struct roc_sso *roc_sso) goto fail; } - plt_spinlock_lock(&sso->mbox_lock); rc = sso_rsrc_get(roc_sso); if (rc < 0) { plt_err("Failed to get SSO resources"); @@ -880,7 +857,6 @@ roc_sso_dev_init(struct roc_sso *roc_sso) sso->pci_dev = pci_dev; sso->dev.drv_inited = true; roc_sso->lmt_base = sso->dev.lmt_base; - plt_spinlock_unlock(&sso->mbox_lock); return 0; link_mem_free: @@ -888,7 +864,6 @@ roc_sso_dev_init(struct roc_sso *roc_sso) rsrc_fail: rc |= dev_fini(&sso->dev, pci_dev); fail: - plt_spinlock_unlock(&sso->mbox_lock); return rc; } diff --git a/drivers/common/cnxk/roc_sso_priv.h b/drivers/common/cnxk/roc_sso_priv.h index 674e4e0a39..09729d4f62 100644 --- a/drivers/common/cnxk/roc_sso_priv.h +++ b/drivers/common/cnxk/roc_sso_priv.h @@ -22,7 +22,6 @@ struct sso { /* SSO link mapping. */ struct plt_bitmap **link_map; void *link_map_mem; - plt_spinlock_t mbox_lock; } __plt_cache_aligned; enum sso_err_status {