From patchwork Fri Mar 3 08:10:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 124762 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A719241DC3; Fri, 3 Mar 2023 09:11:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D17E342BFE; Fri, 3 Mar 2023 09:11:06 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 17ECA42BFE for ; Fri, 3 Mar 2023 09:11:04 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3236qlEK006688 for ; Fri, 3 Mar 2023 00:11:04 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=c4o8JJP6+RUN4szJDpdgUPpspMHJtF/stXZBTP4do2s=; b=fL0JVlJP81hgK9Bkr16LvfgYj30sDC072+QH/F9wIFPmVTgsIVH2yHQEIwlb+HvqVb0k PEBHzLRjKXJ9cKq6tdgyah1h7yrTBoGDCAeWNDbz6jnYIDYTnT+I/ZdPXQM2uEepXKbi E37ZzpUaKvPRVHnXgRUoKVtI/uA9C48MsfsDi3+zV5N8pK7S5+iFg044j937qJdsUsyC 4sKFOe8yE4zj0NYcP6Eh2At49CS1j09Jg4PmlLeeaEd0CJ2/TMQ+0MhscDDg0uXDmOW8 hnqE5OfgB5DifTSs0QZdfUNeIcqkWwhztMUIEUQf/3apGvdc7az2OiUnwif8PWyr0Kmr +A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3p1wr9xbj1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 03 Mar 2023 00:11:04 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 3 Mar 2023 00:11:02 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Fri, 3 Mar 2023 00:11:02 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 86F273F70B8; Fri, 3 Mar 2023 00:10:58 -0800 (PST) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Veerasenareddy Burru Subject: [PATCH 05/15] common/cnxk: distribute SQ's to sdp channels Date: Fri, 3 Mar 2023 13:40:03 +0530 Message-ID: <20230303081013.589868-5-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230303081013.589868-1-ndabilpuram@marvell.com> References: <20230303081013.589868-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: i8S-3hSOpZbp-mdSliV7Az0Y778oFCx4 X-Proofpoint-GUID: i8S-3hSOpZbp-mdSliV7Az0Y778oFCx4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-03_01,2023-03-02_02,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Veerasenareddy Burru map SQ's to SDP channels using round-robin policy. Signed-off-by: Veerasenareddy Burru --- drivers/common/cnxk/roc_nix_queue.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 287a489e7f..009c024064 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -1202,9 +1202,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq) } static int -sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, - uint16_t smq) +sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, uint16_t smq) { + struct roc_nix *roc_nix = nix_priv_to_roc_nix(nix); struct mbox *mbox = (&nix->dev)->mbox; struct nix_cn10k_aq_enq_req *aq; @@ -1220,7 +1220,10 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, aq->sq.max_sqe_size = sq->max_sqe_sz; aq->sq.smq = smq; aq->sq.smq_rr_weight = rr_quantum; - aq->sq.default_chan = nix->tx_chan_base; + if (roc_nix_is_sdp(roc_nix)) + aq->sq.default_chan = nix->tx_chan_base + (sq->qid % nix->tx_chan_cnt); + else + aq->sq.default_chan = nix->tx_chan_base; aq->sq.sqe_stype = NIX_STYPE_STF; aq->sq.ena = 1; aq->sq.sso_ena = !!sq->sso_ena;