@@ -13,6 +13,9 @@
* Netronome vNIC DPDK Poll-Mode Driver: CPP Bridge
*/
+#include <unistd.h>
+#include <sys/ioctl.h>
+
#include <rte_service_component.h>
#include "nfpcore/nfp_cpp.h"
@@ -22,8 +25,6 @@
#include "nfp_logs.h"
#include "nfp_cpp_bridge.h"
-#include <sys/ioctl.h>
-
/* Prototypes */
static int nfp_cpp_bridge_serve_write(int sockfd, struct nfp_cpp *cpp);
static int nfp_cpp_bridge_serve_read(int sockfd, struct nfp_cpp *cpp);
@@ -22,7 +22,6 @@
#include "nfp_logs.h"
#include "nfpcore/nfp_mip.h"
#include "nfpcore/nfp_rtsym.h"
-#include "nfpcore/nfp-common/nfp_platform.h"
static int
nfp_net_rx_fill_freelist(struct nfp_net_rxq *rxq)
@@ -120,11 +120,11 @@ struct nfp_meta_parsed {
#define NFDK_DESC_TX_TYPE_TSO 2
#define NFDK_DESC_TX_TYPE_SIMPLE 8
#define NFDK_DESC_TX_TYPE_GATHER 1
-#define NFDK_DESC_TX_EOP BIT(14)
-#define NFDK_DESC_TX_CHAIN_META BIT(3)
-#define NFDK_DESC_TX_ENCAP BIT(2)
-#define NFDK_DESC_TX_L4_CSUM BIT(1)
-#define NFDK_DESC_TX_L3_CSUM BIT(0)
+#define NFDK_DESC_TX_EOP RTE_BIT32(14)
+#define NFDK_DESC_TX_CHAIN_META RTE_BIT32(3)
+#define NFDK_DESC_TX_ENCAP RTE_BIT32(2)
+#define NFDK_DESC_TX_L4_CSUM RTE_BIT32(1)
+#define NFDK_DESC_TX_L3_CSUM RTE_BIT32(0)
#define NFDK_TX_MAX_DATA_PER_DESC 0x00004000
#define NFDK_TX_DESC_GATHER_MAX 17
deleted file mode 100644
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2018 Netronome Systems, Inc.
- * All rights reserved.
- */
-
-#ifndef __NFP_PLATFORM_H__
-#define __NFP_PLATFORM_H__
-
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdint.h>
-#include <string.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <inttypes.h>
-#include <sys/stat.h>
-#include <limits.h>
-#include <errno.h>
-
-#ifndef BIT_ULL
-#define BIT(x) (1 << (x))
-#define BIT_ULL(x) (1ULL << (x))
-#endif
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(x) RTE_DIM(x)
-#endif
-
-#endif /* __NFP_PLATFORM_H__ */
@@ -11,10 +11,6 @@
#define _NFP_RESID_NO_C_FUNC
#endif
-#ifndef _NFP_RESID_NO_C_FUNC
-#include "nfp_platform.h"
-#endif
-
/*
* NFP Chip Architectures
*
@@ -8,7 +8,6 @@
#include <ethdev_pci.h>
-#include "nfp-common/nfp_platform.h"
#include "nfp-common/nfp_resid.h"
struct nfp_cpp_mutex;
@@ -8,6 +8,7 @@
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
+#include <unistd.h>
#include <sys/types.h>
#include <rte_byteorder.h>
@@ -565,7 +566,7 @@ nfp_cpp_alloc(struct rte_pci_device *dev, int driver_lock_needed)
uint32_t xpbaddr;
size_t tgt;
- for (tgt = 0; tgt < ARRAY_SIZE(cpp->imb_cat_table); tgt++) {
+ for (tgt = 0; tgt < RTE_DIM(cpp->imb_cat_table); tgt++) {
/* Hardcoded XPB IMB Base, island 0 */
xpbaddr = 0x000a0000 + (tgt * 4);
err = nfp_xpb_readl(cpp, xpbaddr,
@@ -63,7 +63,7 @@
#define NFP_HWINFO_VERSION_1 ('H' << 24 | 'I' << 16 | 1 << 8 | 0 << 1 | 0)
#define NFP_HWINFO_VERSION_2 ('H' << 24 | 'I' << 16 | 2 << 8 | 0 << 1 | 0)
-#define NFP_HWINFO_VERSION_UPDATING BIT(0)
+#define NFP_HWINFO_VERSION_UPDATING RTE_BIT32(0)
struct nfp_hwinfo {
uint8_t start[0];
@@ -61,9 +61,9 @@ nffw_fwinfo_mip_offset_get(const struct nffw_fwinfo *fi)
}
#define NFP_IMB_TGTADDRESSMODECFG_MODE_of(_x) (((_x) >> 13) & 0x7)
-#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE BIT(12)
+#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE RTE_BIT32(12)
#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_32_BIT 0
-#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT BIT(12)
+#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT RTE_BIT32(12)
static int
nfp_mip_mu_locality_lsb(struct nfp_cpp *cpp)
@@ -6,7 +6,6 @@
#ifndef __NFP_NFFW_H__
#define __NFP_NFFW_H__
-#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
/*
@@ -61,7 +61,7 @@ nfp_nsp_print_extended_error(uint32_t ret_val)
if (ret_val == 0)
return;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_errors); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_errors); i++)
if (ret_val == (uint32_t)nsp_errors[i].code)
PMD_DRV_LOG(ERR, "err msg: %s", nsp_errors[i].msg);
}
@@ -40,12 +40,12 @@
#define NSP_STATUS_MINOR GENMASK_ULL(43, 32)
#define NSP_STATUS_CODE GENMASK_ULL(31, 16)
#define NSP_STATUS_RESULT GENMASK_ULL(15, 8)
-#define NSP_STATUS_BUSY BIT_ULL(0)
+#define NSP_STATUS_BUSY RTE_BIT64(0)
#define NSP_COMMAND 0x08
#define NSP_COMMAND_OPTION GENMASK_ULL(63, 32)
#define NSP_COMMAND_CODE GENMASK_ULL(31, 16)
-#define NSP_COMMAND_START BIT_ULL(0)
+#define NSP_COMMAND_START RTE_BIT64(0)
/* CPP address to retrieve the data from */
#define NSP_BUFFER 0x10
@@ -152,10 +152,10 @@ enum nfp_eth_fec {
NFP_FEC_DISABLED_BIT,
};
-#define NFP_FEC_AUTO BIT(NFP_FEC_AUTO_BIT)
-#define NFP_FEC_BASER BIT(NFP_FEC_BASER_BIT)
-#define NFP_FEC_REED_SOLOMON BIT(NFP_FEC_REED_SOLOMON_BIT)
-#define NFP_FEC_DISABLED BIT(NFP_FEC_DISABLED_BIT)
+#define NFP_FEC_AUTO RTE_BIT32(NFP_FEC_AUTO_BIT)
+#define NFP_FEC_BASER RTE_BIT32(NFP_FEC_BASER_BIT)
+#define NFP_FEC_REED_SOLOMON RTE_BIT32(NFP_FEC_REED_SOLOMON_BIT)
+#define NFP_FEC_DISABLED RTE_BIT32(NFP_FEC_DISABLED_BIT)
#define ETH_ALEN 6
@@ -83,7 +83,7 @@ nfp_hwmon_read_sensor(struct nfp_cpp *cpp, enum nfp_nsp_sensor_id id, long *val)
if (nsp == NULL)
return -EIO;
- ret = nfp_nsp_read_sensors(nsp, BIT(id), &s, sizeof(s));
+ ret = nfp_nsp_read_sensors(nsp, RTE_BIT32(id), &s, sizeof(s));
nfp_nsp_close(nsp);
if (ret < 0)
@@ -44,30 +44,30 @@
#define NSP_ETH_PORT_INDEX GENMASK_ULL(15, 8)
#define NSP_ETH_PORT_LABEL GENMASK_ULL(53, 48)
#define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54)
-#define NSP_ETH_PORT_FEC_SUPP_BASER BIT_ULL(60)
-#define NSP_ETH_PORT_FEC_SUPP_RS BIT_ULL(61)
+#define NSP_ETH_PORT_FEC_SUPP_BASER RTE_BIT64(60)
+#define NSP_ETH_PORT_FEC_SUPP_RS RTE_BIT64(61)
#define NSP_ETH_PORT_LANES_MASK rte_cpu_to_le_64(NSP_ETH_PORT_LANES)
-#define NSP_ETH_STATE_CONFIGURED BIT_ULL(0)
-#define NSP_ETH_STATE_ENABLED BIT_ULL(1)
-#define NSP_ETH_STATE_TX_ENABLED BIT_ULL(2)
-#define NSP_ETH_STATE_RX_ENABLED BIT_ULL(3)
+#define NSP_ETH_STATE_CONFIGURED RTE_BIT64(0)
+#define NSP_ETH_STATE_ENABLED RTE_BIT64(1)
+#define NSP_ETH_STATE_TX_ENABLED RTE_BIT64(2)
+#define NSP_ETH_STATE_RX_ENABLED RTE_BIT64(3)
#define NSP_ETH_STATE_RATE GENMASK_ULL(11, 8)
#define NSP_ETH_STATE_INTERFACE GENMASK_ULL(19, 12)
#define NSP_ETH_STATE_MEDIA GENMASK_ULL(21, 20)
-#define NSP_ETH_STATE_OVRD_CHNG BIT_ULL(22)
+#define NSP_ETH_STATE_OVRD_CHNG RTE_BIT64(22)
#define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23)
#define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26)
-#define NSP_ETH_CTRL_CONFIGURED BIT_ULL(0)
-#define NSP_ETH_CTRL_ENABLED BIT_ULL(1)
-#define NSP_ETH_CTRL_TX_ENABLED BIT_ULL(2)
-#define NSP_ETH_CTRL_RX_ENABLED BIT_ULL(3)
-#define NSP_ETH_CTRL_SET_RATE BIT_ULL(4)
-#define NSP_ETH_CTRL_SET_LANES BIT_ULL(5)
-#define NSP_ETH_CTRL_SET_ANEG BIT_ULL(6)
-#define NSP_ETH_CTRL_SET_FEC BIT_ULL(7)
+#define NSP_ETH_CTRL_CONFIGURED RTE_BIT64(0)
+#define NSP_ETH_CTRL_ENABLED RTE_BIT64(1)
+#define NSP_ETH_CTRL_TX_ENABLED RTE_BIT64(2)
+#define NSP_ETH_CTRL_RX_ENABLED RTE_BIT64(3)
+#define NSP_ETH_CTRL_SET_RATE RTE_BIT64(4)
+#define NSP_ETH_CTRL_SET_LANES RTE_BIT64(5)
+#define NSP_ETH_CTRL_SET_ANEG RTE_BIT64(6)
+#define NSP_ETH_CTRL_SET_FEC RTE_BIT64(7)
/* Which connector port. */
#define PORT_TP 0x00
@@ -139,7 +139,7 @@ nfp_eth_rate2speed(enum nfp_eth_rate rate)
{
int i;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_eth_rate_tbl); i++)
if (nsp_eth_rate_tbl[i].rate == rate)
return nsp_eth_rate_tbl[i].speed;
@@ -151,7 +151,7 @@ nfp_eth_speed2rate(unsigned int speed)
{
int i;
- for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++)
+ for (i = 0; i < (int)RTE_DIM(nsp_eth_rate_tbl); i++)
if (nsp_eth_rate_tbl[i].speed == speed)
return nsp_eth_rate_tbl[i].rate;
@@ -7,7 +7,6 @@
#define NFP_TARGET_H
#include "nfp-common/nfp_resid.h"
-#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
#define P32 1