From patchwork Tue Apr 11 09:11:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 125918 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 030AA4291B; Tue, 11 Apr 2023 11:13:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 89DD642D38; Tue, 11 Apr 2023 11:12:42 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 40D3142B8E for ; Tue, 11 Apr 2023 11:12:41 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33B84Pdm020822 for ; Tue, 11 Apr 2023 02:12:40 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=pF0/mo+ugFJ6ML7HE9jK62FAOWdmX0OVv06BTm783T4=; b=SjFW73drMELr8N9A67dqU4iOCzr5u6GrbRLRvmgcyy8zQjx0yxMQZpey6j/0RPu+TLpL /ewVqCQSiBwU3KSt5iXKOq105MqLzA72o7HQDrxjgO7am12Qgbz3jY7U4K/Nr4gT/9r/ ysAiqa5ANim2fl8MNUenXsWpMHcQ4UVVLbay1zkGekZBGdyY2g9T+SH7ZapFtCJsquqI ythRIyGopd/l9uEFZxdph3Gc90MI9AL/b0V7Ai7rVclTceqIJMs7/z6SapsKTs6pMEZX 1YQr2IeV528c3KuTlyXAn0lvElad5R7OBr+6vbkqr2W/q6ZnN8uHCpFjtRWTpl8sa31L xQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pvt73b1ux-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 11 Apr 2023 02:12:40 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 11 Apr 2023 02:12:38 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 11 Apr 2023 02:12:38 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 45ED83F7070; Tue, 11 Apr 2023 02:12:36 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Veerasenareddy Burru Subject: [PATCH 13/21] common/cnxk: set relchan in TL4 config for each SDP queue Date: Tue, 11 Apr 2023 14:41:36 +0530 Message-ID: <20230411091144.1087887-13-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230411091144.1087887-1-ndabilpuram@marvell.com> References: <20230411091144.1087887-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: rT2wkZFPDQ6QuXGH2IWcWry2mKgoF-bl X-Proofpoint-ORIG-GUID: rT2wkZFPDQ6QuXGH2IWcWry2mKgoF-bl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-11_05,2023-04-06_03,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Veerasenareddy Burru set distinct relchan in each TL4 queue connected to SDP. currently rechan in TL4 SDP config is getting set to 0 for all SDP-NIX queues. Each TL4 queues for SDP need to be configured with distinct channel for SDP to provide per channel backpressure to NIX. Signed-off-by: Veerasenareddy Burru --- drivers/common/cnxk/roc_nix_tm_utils.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index 5864833109..9ede1bebe7 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -582,6 +582,7 @@ nix_tm_topology_reg_prep(struct nix *nix, struct nix_tm_node *node, /* Configure TL4 to send to SDP channel instead of CGX/LBK */ if (nix->sdp_link) { + relchan = nix->tx_chan_base & 0xff; plt_tm_dbg("relchan=%u schq=%u tx_chan_cnt=%u\n", relchan, schq, nix->tx_chan_cnt); reg[k] = NIX_AF_TL4X_SDP_LINK_CFG(schq);