From patchwork Thu Apr 13 09:44:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjing Qiao X-Patchwork-Id: 126010 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 423F842931; Thu, 13 Apr 2023 11:51:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2523642D37; Thu, 13 Apr 2023 11:50:28 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 149F942D36 for ; Thu, 13 Apr 2023 11:50:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681379426; x=1712915426; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iJS8b289BbEG/ftluEVn/OUjC0eQe2qMP8SQk1HdJwY=; b=FnxWMjWWSjHukAeWRnlgFw3g1seugB90Js/lyN6dUukIeJPlXOFcnx5/ ritmvniQQv74OSjlWTl5RVgEMBO6kvgSOzMH20PH+CQ9Wpcg/XkfcPFfg GKh7R+90AGjMDSr1kIA8PFIW+ZYfucPWpIBEwj2UVqUqDWjL/1orzei2n TVTFoUQL4IJSjbN3K9BUUZZQoohYrD3k4oei7dxP2v3Lq/hwdKq73pkgI OH9o+2VmBUKCQk1xcjkMViE/jKMAMSLPADsENSi7CiD3vbSnpUKf8Qj8R QgEAHeWLsuZeZFpUKmMEffdu4G/EgyxYbxOp5F5ablW00wCIJ4qs8SF1V Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="409290442" X-IronPort-AV: E=Sophos;i="5.98,341,1673942400"; d="scan'208";a="409290442" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2023 02:50:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10678"; a="778699292" X-IronPort-AV: E=Sophos;i="5.98,341,1673942400"; d="scan'208";a="778699292" Received: from dpdk-wenjing-01.sh.intel.com ([10.67.119.244]) by FMSMGA003.fm.intel.com with ESMTP; 13 Apr 2023 02:50:23 -0700 From: Wenjing Qiao To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, Wenjing Qiao , Charles Stoll Subject: [PATCH 08/18] common/idpf: swap opcode and retval location in msg struct Date: Thu, 13 Apr 2023 05:44:52 -0400 Message-Id: <20230413094502.1714755-9-wenjing.qiao@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230413094502.1714755-1-wenjing.qiao@intel.com> References: <20230413094502.1714755-1-wenjing.qiao@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org To make the code more readable and make it clearer that the opcode goes in cookie_high and retval goes in cookie_low. Add macro definitions for filling opcode and retval. Signed-off-by: Charles Stoll Signed-off-by: Wenjing Qiao --- drivers/common/idpf/base/idpf_controlq.c | 2 ++ drivers/common/idpf/base/idpf_controlq_api.h | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c index 8e4d3ee54f..8381e4000f 100644 --- a/drivers/common/idpf/base/idpf_controlq.c +++ b/drivers/common/idpf/base/idpf_controlq.c @@ -288,6 +288,8 @@ int idpf_ctlq_deinit(struct idpf_hw *hw) * send routine via the q_msg struct / control queue specific data struct. * The control queue will hold a reference to each send message until * the completion for that message has been cleaned. + * Since all q_msgs being sent are store in native endianness, these values + * must be converted to LE before being written to the hw descriptor. */ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq, u16 num_q_msg, struct idpf_ctlq_msg q_msg[]) diff --git a/drivers/common/idpf/base/idpf_controlq_api.h b/drivers/common/idpf/base/idpf_controlq_api.h index 32d17baadf..80be282b42 100644 --- a/drivers/common/idpf/base/idpf_controlq_api.h +++ b/drivers/common/idpf/base/idpf_controlq_api.h @@ -63,9 +63,13 @@ struct idpf_ctlq_msg { u16 status; /* when receiving a message */ }; union { +#ifndef __KERNEL__ +#define FILL_OPCODE_V1(msg, opcode) ((msg).cookie.cfg.mbx.chnl_opcode = opcode) +#define FILL_RETVAL_V1(msg, retval) ((msg).cookie.cfg.mbx.chnl_retval = retval) +#endif /* __KERNEL__ */ struct { - u32 chnl_retval; u32 chnl_opcode; + u32 chnl_retval; } mbx; } cookie; union {