From patchwork Wed May 31 10:32:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srujana Challa X-Patchwork-Id: 127753 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D08742BF0; Wed, 31 May 2023 12:32:42 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0752940ED7; Wed, 31 May 2023 12:32:42 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4AA5440A82 for ; Wed, 31 May 2023 12:32:40 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34VA2Q5q015451 for ; Wed, 31 May 2023 03:32:39 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=r1Y5rbbxK0lo3CJPBwGH80KFqbX1J/XogrHDhsg5e8Q=; b=c1B8eT1D/bFNyYKgnoe1806QoE7eXM9l4lgd+/ukzfVUlkJ/X6FK6RStIthbR/ogN7lg /LoVLBqKUnEBDK/Bmh5dgz5FTNo64RgEsToOC3Vc6M3G4l2SccIRHHRX/f884gaEeD09 OiHaiV042pOvcTm/ooLtHqF/kD5yMkhXl+Hp92MFtg6NoVw+WPLOo2aKDl9z2InxV4Ct UML0+YwfXtt2K2CXuB7CSecX8jtRlEzBdR9uZwtI0q9wxFcNXZRCvwGZTs+L/BM1VY5o Oc7mawA2C1ChxoVwHMqiEcUkCTyoFUTi0yMZCKsnNiFK6p7XL4HAIKxwcg5odPkpBCMT WQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3quhcmc2hp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 31 May 2023 03:32:39 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 31 May 2023 03:32:37 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 31 May 2023 03:32:37 -0700 Received: from localhost.localdomain (unknown [10.28.36.175]) by maili.marvell.com (Postfix) with ESMTP id 0B70B3F7040; Wed, 31 May 2023 03:32:34 -0700 (PDT) From: Srujana Challa To: , , , CC: , , Subject: [PATCH v2] event/cnxk: fix LMTST write for single event mode Date: Wed, 31 May 2023 16:02:33 +0530 Message-ID: <20230531103233.3476875-1-schalla@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230530115301.3472521-1-schalla@marvell.com> References: <20230530115301.3472521-1-schalla@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 93xrMHhNy3BZINFuqSCNGUY6yMLFcFAV X-Proofpoint-ORIG-GUID: 93xrMHhNy3BZINFuqSCNGUY6yMLFcFAV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-31_06,2023-05-31_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org LMTST area can be overwritten before read by HW between to consecutive steorl operations. Hence, add wmb() after steorl op to make sure the LMTST operation is complete. Fixes: 313e884a22fd ("event/cnxk: support Tx adapter fast path") Cc: pbhagavatula@marvell.com Signed-off-by: Srujana Challa Acked-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_tx_worker.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/event/cnxk/cn10k_tx_worker.h b/drivers/event/cnxk/cn10k_tx_worker.h index c18786a14c..81fe31c4b9 100644 --- a/drivers/event/cnxk/cn10k_tx_worker.h +++ b/drivers/event/cnxk/cn10k_tx_worker.h @@ -43,7 +43,6 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd, const uint64_t *txq_data, const uint32_t flags) { uint8_t lnum = 0, loff = 0, shft = 0; - uint16_t ref_cnt = m->refcnt; struct cn10k_eth_txq *txq; uintptr_t laddr; uint16_t segdw; @@ -98,10 +97,9 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd, roc_lmt_submit_steorl(lmt_id, pa); - if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) { - if (ref_cnt > 1) - rte_io_wmb(); - } + /* Memory barrier to make sure lmtst store completes */ + rte_io_wmb(); + return 1; }