[v7,1/3] common/qat: fix qat_dev_cmd_param corruption
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Commit Message
Adding fix to address the memory corruption issue for
qat_dev_cmd_param structure on QAT GEN3.
This fix aligns the storage where it stores the value
on 4 byte unsigned integer data type after
reading slice configuration of QAT capabilities.
Fixes: b3cbbcdffa4f ("common/qat: read HW slice configuration")
Cc: stable@dpdk.org
Cc: arkadiuszx.kusztal@intel.com
Signed-off-by: Vikash Poddar <vikash.chandrax.poddar@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
---
v7:
"support to enable insecure algorithms" commit is dependent on
this patch
---
drivers/common/qat/dev/qat_dev_gen1.c | 2 +-
drivers/common/qat/dev/qat_dev_gen2.c | 2 +-
drivers/common/qat/dev/qat_dev_gen3.c | 2 +-
drivers/common/qat/dev/qat_dev_gen4.c | 2 +-
drivers/common/qat/qat_device.c | 2 +-
drivers/common/qat/qat_device.h | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
Comments
> Adding fix to address the memory corruption issue for
> qat_dev_cmd_param structure on QAT GEN3.
>
> This fix aligns the storage where it stores the value
> on 4 byte unsigned integer data type after
> reading slice configuration of QAT capabilities.
>
> Fixes: b3cbbcdffa4f ("common/qat: read HW slice configuration")
> Cc: stable@dpdk.org
> Cc: arkadiuszx.kusztal@intel.com
>
> Signed-off-by: Vikash Poddar <vikash.chandrax.poddar@intel.com>
> Acked-by: Ciara Power <ciara.power@intel.com>
Series
Applied to dpdk-next-crypto
Thanks.
@@ -242,7 +242,7 @@ qat_dev_get_extra_size_gen1(void)
}
static int
-qat_get_dev_slice_map_gen1(uint16_t *map __rte_unused,
+qat_get_dev_slice_map_gen1(uint32_t *map __rte_unused,
const struct rte_pci_device *pci_dev __rte_unused)
{
return 0;
@@ -22,7 +22,7 @@ static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen2 = {
};
static int
-qat_dev_get_slice_map_gen2(uint16_t *map __rte_unused,
+qat_dev_get_slice_map_gen2(uint32_t *map __rte_unused,
const struct rte_pci_device *pci_dev __rte_unused)
{
return 0;
@@ -68,7 +68,7 @@ static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen3 = {
};
static int
-qat_dev_get_slice_map_gen3(uint16_t *map,
+qat_dev_get_slice_map_gen3(uint32_t *map,
const struct rte_pci_device *pci_dev)
{
if (rte_pci_read_config(pci_dev, map,
@@ -283,7 +283,7 @@ qat_dev_get_misc_bar_gen4(struct rte_mem_resource **mem_resource,
}
static int
-qat_dev_get_slice_map_gen4(uint16_t *map __rte_unused,
+qat_dev_get_slice_map_gen4(uint32_t *map __rte_unused,
const struct rte_pci_device *pci_dev __rte_unused)
{
return 0;
@@ -367,7 +367,7 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
{
int sym_ret = 0, asym_ret = 0, comp_ret = 0;
int num_pmds_created = 0;
- uint16_t capa = 0;
+ uint32_t capa = 0;
struct qat_pci_device *qat_pci_dev;
struct qat_dev_hw_spec_funcs *ops_hw;
struct qat_dev_cmd_param qat_dev_cmd_param[] = {
@@ -38,7 +38,7 @@ typedef int (*qat_dev_get_misc_bar_t)
typedef int (*qat_dev_read_config_t)
(struct qat_pci_device *);
typedef int (*qat_dev_get_extra_size_t)(void);
-typedef int (*qat_dev_get_slice_map_t)(uint16_t *map,
+typedef int (*qat_dev_get_slice_map_t)(uint32_t *map,
const struct rte_pci_device *pci_dev);
struct qat_dev_hw_spec_funcs {