From patchwork Mon Jun 19 12:45:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejasree Kondoj X-Patchwork-Id: 128793 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63C4142CFA; Mon, 19 Jun 2023 14:46:04 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B066242D2C; Mon, 19 Jun 2023 14:45:45 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 6F6C3410F6 for ; Mon, 19 Jun 2023 14:45:44 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 35JBOGin020833 for ; Mon, 19 Jun 2023 05:45:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=D5yrDooSPeeEyhPu5UV7ZZrQjiWUeS5qWoBUuOQeE7I=; b=ZqkSsuCuwuwtLhgEXiTy4YW8MRLNwr7jVjPgHx6Fr/BQmEmKJEgSYcXW3HBxESvpEv51 Wy5cO0Sr/9HlgXDZWjvgUTTZrdjGSBfdbvgKJ5YhL7IIPQTt+PuFXlO6QdfCLvrLhcnJ BIqRKC22jPAYsWMcIKrCKwX4nX9SqHcrBdI2iUeB0oFNDuwQhAlC3UjqQCFLjTwF434x D8tVweUuxxCbW4oapgUx+XbrxXA+3/g02c9eOTYHWqHKJX21ZOtBGlgh/PwIebVwP7PV TQhdbXrbIBzNYldvDZluXowfGG2p/eQW+2iDmBPMG9R710kMvNrDg9E/MSZ9qNoh5ImP hw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3r9a6n5hmc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 19 Jun 2023 05:45:43 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 19 Jun 2023 05:45:42 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 19 Jun 2023 05:45:42 -0700 Received: from hyd1554.marvell.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 0AAF85C68EB; Mon, 19 Jun 2023 05:45:39 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Anoob Joseph , Aakash Sasidharan , Gowrishankar Muthukrishnan , Vidya Sagar Velumuri , Subject: [PATCH 4/8] crypto/cnxk: enable context cache for 103XX Date: Mon, 19 Jun 2023 18:15:24 +0530 Message-ID: <20230619124528.3967275-5-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230619124528.3967275-1-ktejasree@marvell.com> References: <20230619124528.3967275-1-ktejasree@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: j_Uy5hmc9oVI_Co8YQYVBGtiebO2pZtq X-Proofpoint-GUID: j_Uy5hmc9oVI_Co8YQYVBGtiebO2pZtq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-06-19_09,2023-06-16_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enabling context cache for SE instructions on 106B0 and 103XX. Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 6 +++--- drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 8 ++++++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index 2018b0eba5..d0c99d37e8 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -653,7 +653,7 @@ cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt) inst_w7.s.cptr = (uint64_t)&sess->roc_se_ctx.se_ctx; - if (roc_errata_cpt_hang_on_mixed_ctx_val()) + if (hw_ctx_cache_enable()) inst_w7.s.ctx_val = 1; else inst_w7.s.cptr += 8; @@ -729,7 +729,7 @@ sym_session_configure(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xfor sess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt); - if (roc_errata_cpt_hang_on_mixed_ctx_val()) + if (hw_ctx_cache_enable()) roc_se_ctx_init(&sess_priv->roc_se_ctx); return 0; @@ -755,7 +755,7 @@ sym_session_clear(struct rte_cryptodev_sym_session *sess, bool is_session_less) struct cnxk_se_sess *sess_priv = (struct cnxk_se_sess *)sess; /* Trigger CTX flush + invalidate to remove from CTX_CACHE */ - if (roc_errata_cpt_hang_on_mixed_ctx_val()) + if (hw_ctx_cache_enable()) roc_cpt_lf_ctx_flush(sess_priv->lf, &sess_priv->roc_se_ctx.se_ctx, true); if (sess_priv->roc_se_ctx.auth_key != NULL) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h index b1a40e8e25..6ee4cbda70 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h @@ -13,6 +13,7 @@ #include "roc_constants.h" #include "roc_cpt.h" #include "roc_cpt_sg.h" +#include "roc_errata.h" #include "roc_se.h" #define CNXK_CPT_MIN_HEADROOM_REQ 32 @@ -180,4 +181,11 @@ alloc_op_meta(struct roc_se_buf_ptr *buf, int32_t len, struct rte_mempool *cpt_m return mdata; } + +static __rte_always_inline bool +hw_ctx_cache_enable(void) +{ + return roc_errata_cpt_hang_on_mixed_ctx_val() || roc_model_is_cn10ka_b0() || + roc_model_is_cn10kb_a0(); +} #endif /* _CNXK_CRYPTODEV_OPS_H_ */