From patchwork Fri Aug 11 08:57:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 130141 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 595A043032; Fri, 11 Aug 2023 11:00:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B0289432A7; Fri, 11 Aug 2023 10:59:41 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 75AF143247 for ; Fri, 11 Aug 2023 10:59:38 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37AN2WVA011282 for ; Fri, 11 Aug 2023 01:59:38 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=xy3uN3Gw5QwVoaqPLaPDHGcz8tqaLcg6Aovw1l2r4lQ=; b=Elf525X5s0MjvX5m+6wHlfZ6mBh3fR8o3R73DynoECxIvUDASRd8pDxIGnH7Q1P5EK0r kBe8BanBTCqGWb6WjRzES9WRgQbp3C9UzVxdbpbh9N1TweRpnMrxI9/WJHVoSJQ6L00k isDz+0OfKG3iExZYU5xOEZS0uml6pKNJfUDyhUjznudYuZt0lPpYbyXL2Qb0XqWisfjC VLyt3kZm2919PkKBwJmO016PwZSivXNKnBGVwSOI9B/u7df2Zd3APBaa+2iC7C8jsBnL V39Hlv5zT7yg1JYahNub0v3FMWyNgn4jCkIKioqF5hKF/3i/8bw9ne1GFWwFZ+7hEW4M Dw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sd8ya1gcd-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 11 Aug 2023 01:59:37 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 11 Aug 2023 01:59:24 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 11 Aug 2023 01:59:24 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 725A63F706C; Fri, 11 Aug 2023 01:59:22 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Akhil Goyal Subject: [PATCH 25/31] net/cnxk: update different size bit operations Date: Fri, 11 Aug 2023 14:27:59 +0530 Message-ID: <20230811085805.441256-25-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230811085805.441256-1-ndabilpuram@marvell.com> References: <20230811085805.441256-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: uJkP8Je-5TaROG4ZtQnLmSIiNpxm9_9- X-Proofpoint-GUID: uJkP8Je-5TaROG4ZtQnLmSIiNpxm9_9- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_20,2023-08-10_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Akhil Goyal Certain bitwise operations are done with different sized operands which causes warnings in static code analysis. The necessary operands are typecast to remove the warning. Signed-off-by: Akhil Goyal --- drivers/net/cnxk/cn10k_ethdev.c | 2 +- drivers/net/cnxk/cn10k_rx.h | 10 +++++----- drivers/net/cnxk/cn10k_tx.h | 12 ++++++------ 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index 4c4acc7cf0..40437d2d73 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -262,7 +262,7 @@ cn10k_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, txq->cpt_desc = inl_lf->nb_desc * 0.7; txq->sa_base = (uint64_t)dev->outb.sa_base; - txq->sa_base |= eth_dev->data->port_id; + txq->sa_base |= (uint64_t)eth_dev->data->port_id; PLT_STATIC_ASSERT(ROC_NIX_INL_SA_BASE_ALIGN == BIT_ULL(16)); } diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h index 0dc0b0595c..a696427091 100644 --- a/drivers/net/cnxk/cn10k_rx.h +++ b/drivers/net/cnxk/cn10k_rx.h @@ -795,7 +795,7 @@ cn10k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag, /* Skip rx ol flags extraction for Security packets */ if ((!(flag & NIX_RX_SEC_REASSEMBLY_F) || !(w1 & BIT(11))) && flag & NIX_RX_OFFLOAD_CHECKSUM_F) - ol_flags |= nix_rx_olflags_get(lookup_mem, w1); + ol_flags |= (uint64_t)nix_rx_olflags_get(lookup_mem, w1); if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) { if (rx->vtag0_gone) { @@ -1334,10 +1334,10 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, } if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) { - ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1); - ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1); - ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1); - ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1); + ol_flags0 |= (uint64_t)nix_rx_olflags_get(lookup_mem, cq0_w1); + ol_flags1 |= (uint64_t)nix_rx_olflags_get(lookup_mem, cq1_w1); + ol_flags2 |= (uint64_t)nix_rx_olflags_get(lookup_mem, cq2_w1); + ol_flags3 |= (uint64_t)nix_rx_olflags_get(lookup_mem, cq3_w1); } /* Translate meta to mbuf */ diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index 298d243aac..04d02317b1 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -484,7 +484,7 @@ cn10k_nix_sec_steorl(uintptr_t io_addr, uint32_t lmt_id, uint8_t lnum, data &= ~(0x7ULL << 16); /* Update lines - 1 that contain valid data */ data |= ((uint64_t)(lnum + loff - 1)) << 12; - data |= lmt_id; + data |= (uint64_t)lmt_id; /* STEOR */ roc_lmt_submit_steorl(data, pa); @@ -577,7 +577,7 @@ cn10k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1, nixtx = (nixtx - 1) & ~(BIT_ULL(7) - 1); nixtx += 16; - w0 |= cn10k_nix_tx_ext_subs(flags) + 1; + w0 |= cn10k_nix_tx_ext_subs(flags) + 1ULL; dptr += l2_len; ucode_cmd[1] = dptr; *cmd1 = vsetq_lane_u16(pkt_len + dlen_adj, *cmd1, 0); @@ -718,7 +718,7 @@ cn10k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr, nixtx = (nixtx - 1) & ~(BIT_ULL(7) - 1); nixtx += 16; - w0 |= cn10k_nix_tx_ext_subs(flags) + 1; + w0 |= cn10k_nix_tx_ext_subs(flags) + 1ULL; dptr += l2_len; ucode_cmd[1] = dptr; sg->seg1_size = pkt_len + dlen_adj; @@ -1421,7 +1421,7 @@ cn10k_nix_xmit_pkts(void *tx_queue, uint64_t *ws, struct rte_mbuf **tx_pkts, pa = io_addr | (data & 0x7) << 4; data &= ~0x7ULL; data |= ((uint64_t)(burst - 1)) << 12; - data |= lmt_id; + data |= (uint64_t)lmt_id; if (flags & NIX_TX_VWQE_F) cn10k_nix_vwqe_wait_fc(txq, burst); @@ -1583,7 +1583,7 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws, data0 &= ~0x7ULL; /* Move lmtst1..15 sz to bits 63:19 */ data0 <<= 16; - data0 |= ((burst - 1) << 12); + data0 |= ((burst - 1ULL) << 12); data0 |= (uint64_t)lmt_id; if (flags & NIX_TX_VWQE_F) @@ -3193,7 +3193,7 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, wd.data[0] <<= 16; wd.data[0] |= ((uint64_t)(lnum - 1)) << 12; - wd.data[0] |= lmt_id; + wd.data[0] |= (uint64_t)lmt_id; if (flags & NIX_TX_VWQE_F) cn10k_nix_vwqe_wait_fc(txq, burst);