diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 33d0f2d18e..a20ea73605 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -177,7 +177,8 @@ struct mlx5dr_definer_conv_data {
 	X(SET_BE32,     ipsec_spi,              v->hdr.spi,             rte_flow_item_esp) \
 	X(SET_BE32,     ipsec_sequence_number,  v->hdr.seq,             rte_flow_item_esp) \
 	X(SET,		ib_l4_udp_port,		UDP_ROCEV2_PORT,	rte_flow_item_ib_bth) \
-	X(SET,		ib_l4_opcode,		v->hdr.opcode,		rte_flow_item_ib_bth)
+	X(SET,		ib_l4_opcode,		v->hdr.opcode,		rte_flow_item_ib_bth) \
+	X(SET,		random_number,		v->value,		rte_flow_item_random) \
 
 /* Item set function format */
 #define X(set_type, func_name, value, item_type) \
@@ -1965,6 +1966,33 @@ mlx5dr_definer_conv_item_ipv6_routing_ext(struct mlx5dr_definer_conv_data *cd,
 	return 0;
 }
 
+static int
+mlx5dr_definer_conv_item_random(struct mlx5dr_definer_conv_data *cd,
+				struct rte_flow_item *item,
+				int item_idx)
+{
+	const struct rte_flow_item_random *m = item->mask;
+	const struct rte_flow_item_random *l = item->last;
+	struct mlx5dr_definer_fc *fc;
+
+	if (!m)
+		return 0;
+
+	if (m->value != (m->value & UINT16_MAX)) {
+		DR_LOG(ERR, "Random value is 16 bits only");
+		rte_errno = EINVAL;
+		return rte_errno;
+	}
+
+	fc = &cd->fc[MLX5DR_DEFINER_FNAME_RANDOM_NUM];
+	fc->item_idx = item_idx;
+	fc->tag_set = &mlx5dr_definer_random_number_set;
+	fc->is_range = l && l->value;
+	DR_CALC_SET_HDR(fc, random_number, random_number);
+
+	return 0;
+}
+
 static int
 mlx5dr_definer_mt_set_fc(struct mlx5dr_match_template *mt,
 			 struct mlx5dr_definer_fc *fc,
@@ -2016,6 +2044,7 @@ mlx5dr_definer_check_item_range_supp(struct rte_flow_item *item)
 	case RTE_FLOW_ITEM_TYPE_TAG:
 	case RTE_FLOW_ITEM_TYPE_META:
 	case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
+	case RTE_FLOW_ITEM_TYPE_RANDOM:
 		return 0;
 	default:
 		DR_LOG(ERR, "Range not supported over item type %d", item->type);
@@ -2319,6 +2348,10 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx,
 			ret = mlx5dr_definer_conv_item_ib_l4(&cd, items, i);
 			item_flags |= MLX5_FLOW_ITEM_IB_BTH;
 			break;
+		case RTE_FLOW_ITEM_TYPE_RANDOM:
+			ret = mlx5dr_definer_conv_item_random(&cd, items, i);
+			item_flags |= MLX5_FLOW_ITEM_RANDOM;
+			break;
 		default:
 			DR_LOG(ERR, "Unsupported item type %d", items->type);
 			rte_errno = ENOTSUP;
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h b/drivers/net/mlx5/hws/mlx5dr_definer.h
index 6b645f4cf0..1405c752b8 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.h
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.h
@@ -136,6 +136,7 @@ enum mlx5dr_definer_fname {
 	MLX5DR_DEFINER_FNAME_OKS2_MPLS4_I,
 	MLX5DR_DEFINER_FNAME_IB_L4_OPCODE,
 	MLX5DR_DEFINER_FNAME_IB_L4_QPN,
+	MLX5DR_DEFINER_FNAME_RANDOM_NUM,
 	MLX5DR_DEFINER_FNAME_MAX,
 };
 
@@ -392,6 +393,11 @@ struct mlx5_ifc_definer_hl_ipv4_src_dst_bits {
 	u8 destination_address[0x20];
 };
 
+struct mlx5_ifc_definer_hl_random_number_bits {
+	u8 random_number[0x10];
+	u8 reserved[0x10];
+};
+
 struct mlx5_ifc_definer_hl_ipv6_addr_bits {
 	u8 ipv6_address_127_96[0x20];
 	u8 ipv6_address_95_64[0x20];
@@ -501,7 +507,7 @@ struct mlx5_ifc_definer_hl_bits {
 	struct mlx5_ifc_definer_hl_mpls_bits mpls_inner;
 	u8 unsupported_config_headers_outer[0x80];
 	u8 unsupported_config_headers_inner[0x80];
-	u8 unsupported_random_number[0x20];
+	struct mlx5_ifc_definer_hl_random_number_bits random_number;
 	struct mlx5_ifc_definer_hl_ipsec_bits ipsec;
 	struct mlx5_ifc_definer_hl_metadata_bits metadata;
 	u8 unsupported_utc_timestamp[0x40];
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 3a97975d69..8a9bd71692 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -233,6 +233,9 @@ enum mlx5_feature_name {
 /* IB BTH ITEM. */
 #define MLX5_FLOW_ITEM_IB_BTH (1ull << 51)
 
+/* Random ITEM */
+#define MLX5_FLOW_ITEM_RANDOM (1ull << 52)
+
 /* Outer Masks. */
 #define MLX5_FLOW_LAYER_OUTER_L3 \
 	(MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)
