From patchwork Wed Aug 23 07:08:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 130669 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BAFAB430DE; Wed, 23 Aug 2023 09:10:04 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B16B143275; Wed, 23 Aug 2023 09:09:25 +0200 (CEST) Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2044.outbound.protection.outlook.com [40.107.6.44]) by mails.dpdk.org (Postfix) with ESMTP id 4B46743267 for ; Wed, 23 Aug 2023 09:09:22 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=S0w5OtxKFr0gLGIxXnAmSYRD4ySfkDO4AXm8rgrTLLXwlf91/7M+vd2BzqHWi/qgxtthbsRn09A9to6RMwhLGqVeRVrX8eQfh7Zo7BvLGb0VVhs7C+/6jnXyuANmXu22igGrtmUttSxv/gCiNzHHSfeVF01QimOSGt9C48lzuutpmSZcanSro7NPOaIx+BhCCSUIq8JyI+Yos5dAU6qmEWjmezai0yxyQI4qYDcDMwtR1mOLIpX/cBUD4ce1psD3zCG1t0KGBXfFyTLOR/xDUWcCykuL1cc5957cjp6xEqCVKOPMlVoe0E8qLesgXhFS4poiT8/gGaM9zBJm7wpPtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=7Y58+o7G8V+px1fttpaff/87UKQWVFJBS+pt2/We4Oc=; b=oGgvPH3XsLZ7P/JRurPue+JeDHQCFh7AUW2x/rFvYH/ZJ6TGVtsbMpvhamfzGJ7pyiYt+IUDmqjEiroFktqbfni1HppSFTeP/4F5nf4Yq1w4inS43MGnaCvzxbS8xceB7awFx7oGzbptkFhmu54T7JMc+5Z9NUG2/SfbLlzKdxBdSuKTxLDZ66H9QqAwhbb0FTYAJDzukZ2XQdGasR/7xKKVN6cnuVETNjfuec68RGxfnPYGEoGAMmxX396BcWfSphsm7n3d2WdZgtq/Ha0o2/7wpdvL8rWjblvwwUZk9xivUTRe8TfhQHeGEwBC/C74pdEhLJt4N0bDmwa8P4fTqQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=7Y58+o7G8V+px1fttpaff/87UKQWVFJBS+pt2/We4Oc=; b=A6puuL33Uv8dhd+++OJdhYQN4qIHmTyJjjB4qnYqbT1KGuFMUPn064UNgOXS0mb5ogQqfYw47KtcUfi0MzoS7bnh2TygkKVsNt4bvDH44L/uCdFG607bB05XmvuoJaGmgCfxQPDvAkWuI5pI1hM+5dMVM8MNG9fupALLwTUb6Cw= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from PAXPR04MB9328.eurprd04.prod.outlook.com (2603:10a6:102:2b6::15) by PA4PR04MB9711.eurprd04.prod.outlook.com (2603:10a6:102:267::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6699.26; Wed, 23 Aug 2023 07:09:21 +0000 Received: from PAXPR04MB9328.eurprd04.prod.outlook.com ([fe80::450d:89ac:4f6a:6ae2]) by PAXPR04MB9328.eurprd04.prod.outlook.com ([fe80::450d:89ac:4f6a:6ae2%4]) with mapi id 15.20.6699.020; Wed, 23 Aug 2023 07:09:21 +0000 From: Hemant Agrawal To: dev@dpdk.org Cc: gakhil@marvell.com, Apeksha Gupta Subject: [PATCH 07/12] crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set Date: Wed, 23 Aug 2023 12:38:50 +0530 Message-Id: <20230823070855.27532-8-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230823070855.27532-1-hemant.agrawal@nxp.com> References: <20230823070855.27532-1-hemant.agrawal@nxp.com> X-ClientProxiedBy: SG2PR02CA0072.apcprd02.prod.outlook.com (2603:1096:4:54::36) To PAXPR04MB9328.eurprd04.prod.outlook.com (2603:10a6:102:2b6::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9328:EE_|PA4PR04MB9711:EE_ X-MS-Office365-Filtering-Correlation-Id: 47909b11-0616-48c8-670d-08dba3a7df7e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xMChFOqVJXUYuGZSJloMksB/2INYykYAJgiCuP6PypoZ6l+NEgQYKAf8uEEpxmDJqa/lXvUAeAKDiTBlty4GcWkhuHQ1aCHrBxyUySdOQShmIGGkbVpOGWJLxw3LvnRtb1B/M6F8O0JLaIlP81dLrp5TNKvERbSVZ7R1l/BB/n+iy6/65eTfJnNAZjZD2eL9piafo/uVTJyk0MJh+we+/PLWd1zxY+SaiqB5mgefuKpcvdIReLEuQrNMVIP4A2pitC8Gs4hiC/ePXsOtzR8Wrkhb+Rrt7R7IBGB4SZzOfu0AzhttbVEYjNueknx0R/irfad4rIIAccZTuBLUPsM0dELB7BSuAGsoM+pP/lxHcrVVLEga7G62T4n5HGHG7gG8/Wf5H9getdSN9TY1aJXWvljeO5bnBtv9wNq4ObMAV1p/9zIYG5+BrrFMWKhy+4oM/rgER0Vi6TyMBb6wvtXKcy5ymuwfqGRcHtlMf56KlgeBjwjw1+sDfzn5L0fQXQDKMYOqmZrXtRRmbljS4VODfhmPOk79Pd0xkghSzwDXDl8k3YlkBhz5rXBI4H7Uh9yaYuCGQrYbJE8m2rA1gzVy1J4R0bJfzhYmoUcPiA3iTyc= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:PAXPR04MB9328.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(39860400002)(366004)(346002)(136003)(376002)(396003)(1800799009)(451199024)(186009)(30864003)(83380400001)(2906002)(52116002)(66946007)(6486002)(6506007)(478600001)(2616005)(26005)(5660300002)(44832011)(1076003)(4326008)(8936002)(8676002)(38100700002)(38350700002)(6666004)(66556008)(316002)(6916009)(66476007)(41300700001)(6512007)(86362001)(36756003); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RtJjIoCY7MjJYsb593hz5aFDlItnZnvB7CI54twppPvuZbaVcmawSfd2xKxflTfjqMJPnA0cNMF9GMAh2xCzpo6RgzYvLP7NJZRsRF26K5i1Hhc5SCJg/0jaz7tYji+rQ0T+Lvi9TLYhLXVc8gzvcAYxEE9ECXq1vdcNsil3acQX/RsQka/E2WgMsEST9LTzS0LoX1hR/nCdA4OHeEHRKJdl48mn6gAQ/BFADb2MLnlD1qgVDI/7oWnQFN0+0Huz5Q3fPwOH7R9RAcVF/Kp4Rvnz/Yivc2ClaCzAsO30CDXZa1S19kc9nd+rAWxEgadj2Z0s9iwr1Jj4Bt2Xvl0yCM1FjbGDePvuFF33cEjcrtSI8n1OA85ul80/VGngFllUvF2Z9Evz80615VdmbGKmLGjfAdirw+lzA7KbL4P/zv2sg28BR69PAfNxj45mciA1e5HdVyqmG/rf71Hunt0jUy8SbA6hrRYEBNhF6qFLbbTZtympKDM3GOV4yUuRjpD6mqPfiUzr26UPfAesSOBCRmktz3m4F1GLdWVtdPUsBKBEgBzdhpDGb2IHbhh3+hmlkuBdN8PT3EYhbmOtR/eXLG+kFh4ls/hfzVB6sthxM/goZFGgfSRhsSoVOQ83oAfzMn0LTYSQNbNH+3u0VoJF+r5QubxlbqxV4WvMHPbkVhR1SxlY8EEZbLlXAA3oSGv7HgXiWa602L9XNGb+5S/xYcgHvDCFWSdJwhS3h30FomRJNG4a+UwaEFpLf65QsloALoiEeZhreiInungjkd8WA3/nvCF2583qnTdC/Jzd5WdruX6TbKzAIW7unubPu7Gv6ADFTtoquoinc7Nf8oOQ/6L7/GD6bdNX8ZOV7c8ATcxY7JPPLMFLwRTCv8nwsMa2kiOiyFT3ZKv7QCwcmGBfaZCFIQlM7DN6erEffqgQeSTBOrx16m3uYT2Ijifkyy9tp09xtKer/RdWtTuNhT6hOiqR/oCbxmRx9kcwW1W2+7N6SON7xlGZQqu4bb/B3dc0f03qiDGxFvW+kMG6qJHLZghswm6EZS3mpPV2Rd5OpGGgGk7Z0YfFBbzuvNKgJ8ZRSSRxBEL87oIG9NsWcpQk2DmIhWHBP7scJ4sDKBhJQ1v1EplqpyepZZeqxe7VHK3YE78eQv6JcJx91eJeCxkmVh2/bq51n5ybjx653Jx2mKx6zyQL/Bb1alDSFXkkVscoi+2AfZln02+XITfRhuu+MXbkcyKjJq+EdNhdaw97A1iAes8vnRHdZlW9r29gJ269aXNQd92Gv7bnoSHAqpd1bSLUhy9FEHZrbKqu6QSdsdMRKlU9+gsoI5A+bQj5w9my1bqfMFVUdkqh5jxWcTFXOlVP+6Rm9RLnUOMniMfsbhnNm7+7ZdNd4l56GojQ8b/PgUV/fGsanMpTibSzXCsiNF3rRa/ZzSZBvJnl4pHnJd4LgH5oLajZRjVuJ/pIsLvxTzCpF38xR2rCjQg8mHaGP6fCtsbEQUDgPVLL6d7QfbFG/wSrAcdI0Jle1YQ1e3xJ/UlLCQBUBQAy/WphUc/RWEupUejUuFVD0jSkcnE8Ni5mXvqTB1E9LHP4qQCBbhVbzx2HDvSbj+cEEYM9LpTUgA== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 47909b11-0616-48c8-670d-08dba3a7df7e X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9328.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Aug 2023 07:09:20.9341 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0CSLAWYtDJ5Z/thFta7ThkrteAwYJ8rn2WEO9QRTnh/DCrwMqLGGQ9Euc50pTb9smN6RducqVRYCkYn/I4lmAw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB9711 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Apeksha Gupta The macro DPAA2_SET_FLE_OFFSET(fle, offset) only works for masking the offset upto with 12 bits. When the offset value is more that 12 bits, this macro may over writing the FMT/SL/F bits which are beyond the offset bits. The FLE_ADDR is modified to FLE_ADDR + OFFSET, and the FLE_OFFSET is made to 0. Signed-off-by: Apeksha Gupta --- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 87 +++++++-------------- drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 47 +++-------- drivers/net/dpaa2/dpaa2_rxtx.c | 3 +- 3 files changed, 38 insertions(+), 99 deletions(-) diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 0a0b7f15af..36f08afccc 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -138,16 +138,14 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess, DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge)); /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); /* o/p segs */ while (mbuf->next) { sge->length = mbuf->data_len; out_len += sge->length; sge++; mbuf = mbuf->next; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); } /* using buf_len for last buf - so that extra data can be added */ sge->length = mbuf->buf_len - mbuf->data_off; @@ -165,8 +163,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess, DPAA2_SET_FLE_FIN(ip_fle); /* Configure input SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; in_len += sge->length; @@ -174,8 +171,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess, /* i/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; in_len += sge->length; mbuf = mbuf->next; @@ -247,13 +243,11 @@ build_proto_compound_fd(dpaa2_sec_session *sess, DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc)); /* Configure Output FLE with dst mbuf data */ - DPAA2_SET_FLE_ADDR(op_fle, DPAA2_MBUF_VADDR_TO_IOVA(dst_mbuf)); - DPAA2_SET_FLE_OFFSET(op_fle, dst_mbuf->data_off); + DPAA2_SET_FLE_ADDR(op_fle, rte_pktmbuf_iova(dst_mbuf)); DPAA2_SET_FLE_LEN(op_fle, dst_mbuf->buf_len); /* Configure Input FLE with src mbuf data */ - DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_MBUF_VADDR_TO_IOVA(src_mbuf)); - DPAA2_SET_FLE_OFFSET(ip_fle, src_mbuf->data_off); + DPAA2_SET_FLE_ADDR(ip_fle, rte_pktmbuf_iova(src_mbuf)); DPAA2_SET_FLE_LEN(ip_fle, src_mbuf->pkt_len); DPAA2_SET_FD_LEN(fd, ip_fle->length); @@ -373,16 +367,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess, sym_op->aead.data.length; /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->aead.data.offset); sge->length = mbuf->data_len - sym_op->aead.data.offset; mbuf = mbuf->next; /* o/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -420,17 +412,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess, sge++; } - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset + - mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->aead.data.offset); sge->length = mbuf->data_len - sym_op->aead.data.offset; mbuf = mbuf->next; /* i/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -535,8 +524,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess, DPAA2_SET_FLE_SG_EXT(fle); /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst)); - DPAA2_SET_FLE_OFFSET(sge, dst->data_off + sym_op->aead.data.offset); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(dst) + sym_op->aead.data.offset); sge->length = sym_op->aead.data.length; if (sess->dir == DIR_ENC) { @@ -571,9 +559,7 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess, sge++; } - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src)); - DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset + - sym_op->m_src->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + sym_op->aead.data.offset); sge->length = sym_op->aead.data.length; if (sess->dir == DIR_DEC) { sge++; @@ -666,16 +652,14 @@ build_authenc_sg_fd(dpaa2_sec_session *sess, sym_op->cipher.data.length; /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->auth.data.offset); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->auth.data.offset); sge->length = mbuf->data_len - sym_op->auth.data.offset; mbuf = mbuf->next; /* o/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -706,17 +690,14 @@ build_authenc_sg_fd(dpaa2_sec_session *sess, sge->length = sess->iv.length; sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset + - mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + sym_op->auth.data.offset); sge->length = mbuf->data_len - sym_op->auth.data.offset; mbuf = mbuf->next; /* i/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -830,9 +811,7 @@ build_authenc_fd(dpaa2_sec_session *sess, DPAA2_SET_FLE_SG_EXT(fle); /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst)); - DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset + - dst->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(dst) + sym_op->cipher.data.offset); sge->length = sym_op->cipher.data.length; if (sess->dir == DIR_ENC) { @@ -862,9 +841,7 @@ build_authenc_fd(dpaa2_sec_session *sess, sge->length = sess->iv.length; sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src)); - DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset + - sym_op->m_src->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + sym_op->auth.data.offset); sge->length = sym_op->auth.data.length; if (sess->dir == DIR_DEC) { sge++; @@ -965,8 +942,7 @@ static inline int build_auth_sg_fd( sge++; } /* i/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset); if (data_len <= (mbuf->data_len - data_offset)) { sge->length = data_len; @@ -978,8 +954,7 @@ static inline int build_auth_sg_fd( while ((data_len = data_len - sge->length) && (mbuf = mbuf->next)) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); if (data_len > mbuf->data_len) sge->length = mbuf->data_len; else @@ -1097,8 +1072,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op, } /* Setting data to authenticate */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src)); - DPAA2_SET_FLE_OFFSET(sge, data_offset + sym_op->m_src->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + data_offset); sge->length = data_len; if (sess->dir == DIR_DEC) { @@ -1183,16 +1157,14 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op, DPAA2_SET_FLE_SG_EXT(op_fle); /* o/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset); sge->length = mbuf->data_len - data_offset; mbuf = mbuf->next; /* o/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -1212,22 +1184,19 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op, /* i/p IV */ DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr)); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sess->iv.length; sge++; /* i/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, data_offset + mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + data_offset); sge->length = mbuf->data_len - data_offset; mbuf = mbuf->next; /* i/p segs */ while (mbuf) { sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf)); - DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf)); sge->length = mbuf->data_len; mbuf = mbuf->next; } @@ -1328,8 +1297,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op, sess->iv.length, sym_op->m_src->data_off); - DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst)); - DPAA2_SET_FLE_OFFSET(fle, data_offset + dst->data_off); + DPAA2_SET_FLE_ADDR(fle, rte_pktmbuf_iova(dst) + data_offset); fle->length = data_len + sess->iv.length; @@ -1349,8 +1317,7 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op, sge->length = sess->iv.length; sge++; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src)); - DPAA2_SET_FLE_OFFSET(sge, data_offset + sym_op->m_src->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(sym_op->m_src) + data_offset); sge->length = data_len; DPAA2_SET_FLE_FIN(sge); diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c index 36c79e450a..4754b9d6f8 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c @@ -95,29 +95,25 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx, /* OOP */ if (dest_sgl) { /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + ofs.ofs.cipher.head); sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head; /* o/p segs */ for (i = 1; i < dest_sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = dest_sgl->vec[i].len; } sge->length -= ofs.ofs.cipher.tail; } else { /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head); sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; /* o/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } sge->length -= ofs.ofs.cipher.tail; @@ -148,14 +144,12 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx, sge->length = sess->iv.length; sge++; - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.auth.head); sge->length = sgl->vec[0].len - ofs.ofs.auth.head; for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } @@ -244,28 +238,24 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx, /* OOP */ if (dest_sgl) { /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + ofs.ofs.cipher.head); sge->length = dest_sgl->vec[0].len - ofs.ofs.cipher.head; /* o/p segs */ for (i = 1; i < dest_sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = dest_sgl->vec[i].len; } } else { /* Configure Output SGE for Encap/Decap */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head); sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; /* o/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } } @@ -299,15 +289,13 @@ build_raw_dp_aead_fd(uint8_t *drv_ctx, sge++; } - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, ofs.ofs.cipher.head); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + ofs.ofs.cipher.head); sge->length = sgl->vec[0].len - ofs.ofs.cipher.head; /* i/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } @@ -412,8 +400,7 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx, sge++; } /* i/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, data_offset); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset); if (data_len <= (int)(sgl->vec[0].len - data_offset)) { sge->length = data_len; @@ -423,7 +410,6 @@ build_raw_dp_auth_fd(uint8_t *drv_ctx, for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } } @@ -502,14 +488,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx, if (dest_sgl) { /* Configure Output SGE for Encap/Decap */ DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = dest_sgl->vec[0].len; out_len += sge->length; /* o/p segs */ for (i = 1; i < dest_sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = dest_sgl->vec[i].len; out_len += sge->length; } @@ -518,14 +502,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx, } else { /* Configure Output SGE for Encap/Decap */ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[0].len; out_len += sge->length; /* o/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; out_len += sge->length; } @@ -545,14 +527,12 @@ build_raw_dp_proto_fd(uint8_t *drv_ctx, /* Configure input SGE for Encap/Decap */ DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[0].len; in_len += sge->length; /* i/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; in_len += sge->length; } @@ -638,28 +618,24 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx, /* OOP */ if (dest_sgl) { /* o/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, data_offset); + DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[0].iova + data_offset); sge->length = dest_sgl->vec[0].len - data_offset; /* o/p segs */ for (i = 1; i < dest_sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, dest_sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = dest_sgl->vec[i].len; } } else { /* o/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, data_offset); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset); sge->length = sgl->vec[0].len - data_offset; /* o/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } } @@ -678,21 +654,18 @@ build_raw_dp_cipher_fd(uint8_t *drv_ctx, /* i/p IV */ DPAA2_SET_FLE_ADDR(sge, iv->iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sess->iv.length; sge++; /* i/p 1st seg */ - DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova); - DPAA2_SET_FLE_OFFSET(sge, data_offset); + DPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova + data_offset); sge->length = sgl->vec[0].len - data_offset; /* i/p segs */ for (i = 1; i < sgl->num; i++) { sge++; DPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova); - DPAA2_SET_FLE_OFFSET(sge, 0); sge->length = sgl->vec[i].len; } DPAA2_SET_FLE_FIN(sge); diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index 85910bbd8f..23f7c4132d 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -471,8 +471,7 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf, sge = &sgt[i]; /*Resetting the buffer pool id and offset field*/ sge->fin_bpid_offset = 0; - DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(cur_seg)); - DPAA2_SET_FLE_OFFSET(sge, cur_seg->data_off); + DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(cur_seg)); sge->length = cur_seg->data_len; if (RTE_MBUF_DIRECT(cur_seg)) { /* if we are using inline SGT in same buffers