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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000E9CF.mail.protection.outlook.com (10.167.241.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6768.25 via Frontend Transport; Fri, 8 Sep 2023 09:21:33 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Fri, 8 Sep 2023 02:21:22 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Fri, 8 Sep 2023 02:21:20 -0700 From: Jiawei Wang To: , , CC: , Subject: [PATCH 1/3] net/mlx5: extend send to kernel action support Date: Fri, 8 Sep 2023 12:20:58 +0300 Message-ID: <20230908092100.38587-2-jiaweiw@nvidia.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20230908092100.38587-1-jiaweiw@nvidia.com> References: <20230908092100.38587-1-jiaweiw@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CF:EE_|CY8PR12MB7193:EE_ X-MS-Office365-Filtering-Correlation-Id: 6d454f56-7f82-4ee7-8ce4-08dbb04cfeaa X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2023 09:21:33.8244 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6d454f56-7f82-4ee7-8ce4-08dbb04cfeaa X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7193 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The send to kernel action was supported in NIC and FDB tables, Currently, the send to kernel action is created in NIC RX only. With some TC rules (example: roce packets, redirects into rep ports) and DPDK RTE rules for the rest of the traffic. Then it needs the specific rule to re-route the packets into the kernel through the FDB table. This patch adds the FDB and NIC-TX tables support for sending to the kernel action. Signed-off-by: Jiawei Wang Acked-by: Suanming Mou --- drivers/net/mlx5/linux/mlx5_os.c | 25 +++++++++++++++---------- drivers/net/mlx5/mlx5.h | 4 +++- drivers/net/mlx5/mlx5_flow.h | 1 + drivers/net/mlx5/mlx5_flow_dv.c | 17 +++++++++++------ 4 files changed, 30 insertions(+), 17 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index d8f1adfe3d..38572eb652 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -675,6 +675,9 @@ void mlx5_os_free_shared_dr(struct mlx5_priv *priv) { struct mlx5_dev_ctx_shared *sh = priv->sh; +#ifdef HAVE_MLX5DV_DR + int i; +#endif MLX5_ASSERT(sh && sh->refcnt); if (sh->refcnt > 1) @@ -703,18 +706,20 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv) mlx5_glue->destroy_flow_action(sh->pop_vlan_action); sh->pop_vlan_action = NULL; } - if (sh->send_to_kernel_action.action) { - void *action = sh->send_to_kernel_action.action; + for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) { + if (sh->send_to_kernel_action[i].action) { + void *action = sh->send_to_kernel_action[i].action; - mlx5_glue->destroy_flow_action(action); - sh->send_to_kernel_action.action = NULL; - } - if (sh->send_to_kernel_action.tbl) { - struct mlx5_flow_tbl_resource *tbl = - sh->send_to_kernel_action.tbl; + mlx5_glue->destroy_flow_action(action); + sh->send_to_kernel_action[i].action = NULL; + } + if (sh->send_to_kernel_action[i].tbl) { + struct mlx5_flow_tbl_resource *tbl = + sh->send_to_kernel_action[i].tbl; - flow_dv_tbl_resource_release(sh, tbl); - sh->send_to_kernel_action.tbl = NULL; + flow_dv_tbl_resource_release(sh, tbl); + sh->send_to_kernel_action[i].tbl = NULL; + } } #endif /* HAVE_MLX5DV_DR */ if (sh->default_miss_action) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 3785103308..6960a07d40 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1432,7 +1432,9 @@ struct mlx5_dev_ctx_shared { /* Direct Rules tables for FDB, NIC TX+RX */ void *dr_drop_action; /* Pointer to DR drop action, any domain. */ void *pop_vlan_action; /* Pointer to DR pop VLAN action. */ - struct mlx5_send_to_kernel_action send_to_kernel_action; +#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) + struct mlx5_send_to_kernel_action send_to_kernel_action[MLX5DR_TABLE_TYPE_MAX]; +#endif struct mlx5_hlist *encaps_decaps; /* Encap/decap action hash list. */ struct mlx5_hlist *modify_cmds; struct mlx5_hlist *tag_table; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 3a97975d69..6beac3902c 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -331,6 +331,7 @@ enum mlx5_feature_name { #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \ + MLX5_FLOW_ACTION_SEND_TO_KERNEL | \ MLX5_FLOW_ACTION_JUMP | MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) #define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index a8dd9920e6..fe0814a2eb 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -12724,17 +12724,22 @@ flow_dv_translate_action_sample(struct rte_eth_dev *dev, static void * flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev, + const struct rte_flow_attr *attr, struct rte_flow_error *error) { struct mlx5_flow_tbl_resource *tbl; struct mlx5_dev_ctx_shared *sh; uint32_t priority; void *action; + int ft_type; int ret; sh = MLX5_SH(dev); - if (sh->send_to_kernel_action.action) - return sh->send_to_kernel_action.action; + ft_type = (attr->ingress) ? MLX5DR_TABLE_TYPE_NIC_RX : + ((attr->transfer) ? MLX5DR_TABLE_TYPE_FDB : + MLX5DR_TABLE_TYPE_NIC_TX); + if (sh->send_to_kernel_action[ft_type].action) + return sh->send_to_kernel_action[ft_type].action; priority = mlx5_get_send_to_kernel_priority(dev); if (priority == (uint32_t)-1) { rte_flow_error_set(error, ENOTSUP, @@ -12742,7 +12747,7 @@ flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev, "required priority is not available"); return NULL; } - tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, 0, + tbl = flow_dv_tbl_resource_get(dev, 0, attr->egress, attr->transfer, false, NULL, 0, 0, 0, error); if (!tbl) { rte_flow_error_set(error, ENODATA, @@ -12759,8 +12764,8 @@ flow_dv_translate_action_send_to_kernel(struct rte_eth_dev *dev, goto err; } MLX5_ASSERT(action); - sh->send_to_kernel_action.action = action; - sh->send_to_kernel_action.tbl = tbl; + sh->send_to_kernel_action[ft_type].action = action; + sh->send_to_kernel_action[ft_type].tbl = tbl; return action; err: flow_dv_tbl_resource_release(sh, tbl); @@ -14511,7 +14516,7 @@ flow_dv_translate(struct rte_eth_dev *dev, break; case RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL: dev_flow->dv.actions[actions_n] = - flow_dv_translate_action_send_to_kernel(dev, + flow_dv_translate_action_send_to_kernel(dev, attr, error); if (!dev_flow->dv.actions[actions_n]) return -rte_errno;