diff --git a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
index 7750a0218e..efaa87c0e5 100644
--- a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
+++ b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h
@@ -15,8 +15,8 @@
 #define NFP_CPP_TARGET_PCIE             9
 #define NFP_CPP_TARGET_ARM              10
 #define NFP_CPP_TARGET_CRYPTO           12
-#define NFP_CPP_TARGET_ISLAND_XPB       14	/* Shared with CAP */
-#define NFP_CPP_TARGET_ISLAND_CAP       14	/* Shared with XPB */
+#define NFP_CPP_TARGET_ISLAND_XPB       14      /* Shared with CAP */
+#define NFP_CPP_TARGET_ISLAND_CAP       14      /* Shared with XPB */
 #define NFP_CPP_TARGET_CT_XPB           14
 #define NFP_CPP_TARGET_LOCAL_SCRATCH    15
 #define NFP_CPP_TARGET_CLS              NFP_CPP_TARGET_LOCAL_SCRATCH
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h
index 82189e9910..92cae2557a 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp.h
+++ b/drivers/net/nfp/nfpcore/nfp_cpp.h
@@ -80,16 +80,17 @@ struct nfp_cpp_operations {
 	 * Serialized
 	 */
 	int (*area_acquire)(struct nfp_cpp_area *area);
+
 	/*
 	 * Release resources for a NFP CPP area
 	 * Serialized
 	 */
 	void (*area_release)(struct nfp_cpp_area *area);
+
 	/*
 	 * Return a void IO pointer to a NFP CPP area
 	 * NOTE: This is _not_ serialized
 	 */
-
 	void *(*area_iomem)(struct nfp_cpp_area *area);
 
 	/*
@@ -280,7 +281,7 @@ void nfp_cpp_free(struct nfp_cpp *cpp);
  * @return
  *   true if model is in the NFP6000 family, false otherwise.
  */
-#define NFP_CPP_MODEL_IS_6000(model)		     \
+#define NFP_CPP_MODEL_IS_6000(model)                         \
 		((NFP_CPP_MODEL_CHIP_of(model) >= 0x3800) && \
 		(NFP_CPP_MODEL_CHIP_of(model) < 0x7000))
 
@@ -290,11 +291,11 @@ uint32_t nfp_cpp_model(struct nfp_cpp *cpp);
  * NFP Interface types - logical interface for this CPP connection 4 bits are
  * reserved for interface type.
  */
-#define NFP_CPP_INTERFACE_TYPE_INVALID		0x0
-#define NFP_CPP_INTERFACE_TYPE_PCI		0x1
-#define NFP_CPP_INTERFACE_TYPE_ARM		0x2
-#define NFP_CPP_INTERFACE_TYPE_RPC		0x3
-#define NFP_CPP_INTERFACE_TYPE_ILA		0x4
+#define NFP_CPP_INTERFACE_TYPE_INVALID          0x0
+#define NFP_CPP_INTERFACE_TYPE_PCI              0x1
+#define NFP_CPP_INTERFACE_TYPE_ARM              0x2
+#define NFP_CPP_INTERFACE_TYPE_RPC              0x3
+#define NFP_CPP_INTERFACE_TYPE_ILA              0x4
 
 /**
  * Construct a 16-bit NFP Interface ID
@@ -316,7 +317,7 @@ uint32_t nfp_cpp_model(struct nfp_cpp *cpp);
  * @return
  *   Interface ID
  */
-#define NFP_CPP_INTERFACE(type, unit, channel)	\
+#define NFP_CPP_INTERFACE(type, unit, channel) \
 	((((type) & 0xf) << 12) | \
 	 (((unit) & 0xf) <<  8) | \
 	 (((channel) & 0xff) << 0))
@@ -354,7 +355,6 @@ uint32_t nfp_cpp_model(struct nfp_cpp *cpp);
  */
 #define NFP_CPP_INTERFACE_CHANNEL_of(interface)	(((interface) >>  0) & 0xff)
 
-
 uint16_t nfp_cpp_interface(struct nfp_cpp *cpp);
 
 int nfp_cpp_serial(struct nfp_cpp *cpp, const uint8_t **serial);
diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
index 7e94bfb611..28a6278497 100644
--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c
@@ -37,7 +37,7 @@
 #include "nfp6000/nfp6000.h"
 #include "../nfp_logs.h"
 
-#define NFP_PCIE_BAR(_pf)	(0x30000 + ((_pf) & 7) * 0xc0)
+#define NFP_PCIE_BAR(_pf)        (0x30000 + ((_pf) & 7) * 0xc0)
 
 #define NFP_PCIE_BAR_PCIE2CPP_ACTION_BASEADDRESS(_x)  (((_x) & 0x1f) << 16)
 #define NFP_PCIE_BAR_PCIE2CPP_BASEADDRESS(_x)         (((_x) & 0xffff) << 0)
@@ -58,7 +58,7 @@
  * Minimal size of the PCIe cfg memory we depend on being mapped,
  * queue controller and DMA controller don't have to be covered.
  */
-#define NFP_PCI_MIN_MAP_SIZE				0x080000        /* 512K */
+#define NFP_PCI_MIN_MAP_SIZE        0x080000        /* 512K */
 
 #define NFP_PCIE_P2C_FIXED_SIZE(bar)               (1 << (bar)->bitsize)
 #define NFP_PCIE_P2C_BULK_SIZE(bar)                (1 << (bar)->bitsize)
@@ -93,7 +93,7 @@ struct nfp_bar {
 	char *iomem;         /**< mapped IO memory */
 };
 
-#define BUSDEV_SZ	13
+#define BUSDEV_SZ    13
 struct nfp_pcie_user {
 	struct nfp_bar bar[NFP_BAR_MAX];
 
@@ -163,7 +163,6 @@ nfp_compute_bar(const struct nfp_bar *bar,
 			return -EINVAL;
 
 		offset &= mask;
-
 		bitsize = 40 - 16;
 	} else {
 		mask = ~(NFP_PCIE_P2C_BULK_SIZE(bar) - 1);
@@ -171,7 +170,6 @@ nfp_compute_bar(const struct nfp_bar *bar,
 		/* Bulk mapping */
 		newcfg |= NFP_PCIE_BAR_PCIE2CPP_MAPTYPE
 				(NFP_PCIE_BAR_PCIE2CPP_MAPTYPE_BULK);
-
 		newcfg |= NFP_PCIE_BAR_PCIE2CPP_TARGET_BASEADDRESS(tgt);
 		newcfg |= NFP_PCIE_BAR_PCIE2CPP_TOKEN_BASEADDRESS(tok);
 
@@ -179,7 +177,6 @@ nfp_compute_bar(const struct nfp_bar *bar,
 			return -EINVAL;
 
 		offset &= mask;
-
 		bitsize = 40 - 21;
 	}
 
@@ -278,6 +275,7 @@ nfp_enable_bars(struct nfp_pcie_user *nfp)
 		start = NFP_BAR_MAX;
 		end = NFP_BAR_MID;
 	}
+
 	for (x = start; x > end; x--) {
 		bar = &nfp->bar[x - 1];
 		bar->barcfg = 0;
@@ -310,6 +308,7 @@ nfp_alloc_bar(struct nfp_pcie_user *nfp)
 		start = NFP_BAR_MAX;
 		end = NFP_BAR_MID;
 	}
+
 	for (x = start; x > end; x--) {
 		bar = &nfp->bar[x - 1];
 		if (bar->lock == 0) {
@@ -317,6 +316,7 @@ nfp_alloc_bar(struct nfp_pcie_user *nfp)
 			return bar;
 		}
 	}
+
 	return NULL;
 }
 
@@ -346,7 +346,6 @@ nfp_disable_bars(struct nfp_pcie_user *nfp)
 }
 
 /* Generic CPP bus access interface. */
-
 struct nfp6000_area_priv {
 	struct nfp_bar *bar;
 	uint32_t bar_offset;
@@ -443,6 +442,7 @@ static void
 nfp6000_area_release(struct nfp_cpp_area *area)
 {
 	struct nfp6000_area_priv *priv = nfp_cpp_area_priv(area);
+
 	priv->bar->lock = 0;
 	priv->bar = NULL;
 	priv->iomem = NULL;
@@ -478,7 +478,6 @@ nfp6000_area_read(struct nfp_cpp_area *area,
 		return -EFAULT;
 
 	width = priv->width.read;
-
 	if (width <= 0)
 		return -EINVAL;
 
@@ -548,7 +547,6 @@ nfp6000_area_write(struct nfp_cpp_area *area,
 		return -EFAULT;
 
 	width = priv->width.write;
-
 	if (width <= 0)
 		return -EINVAL;
 
@@ -718,6 +716,7 @@ nfp6000_set_barsz(struct rte_pci_device *dev,
 		i++;
 
 	desc->barsz = i;
+
 	return 0;
 }
 
diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c
index 37906c6f35..bb6eab36e2 100644
--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c
+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c
@@ -433,7 +433,6 @@ nfp_cpp_area_acquire(struct nfp_cpp_area *area)
 {
 	if (area->cpp->op->area_acquire != NULL) {
 		int err = area->cpp->op->area_acquire(area);
-
 		if (err < 0) {
 			PMD_DRV_LOG(ERR, "Area acquire op failed");
 			return -1;
@@ -862,7 +861,6 @@ nfp_cpp_alloc(struct rte_pci_device *dev,
 	const struct nfp_cpp_operations *ops;
 
 	ops = nfp_cpp_transport_operations();
-
 	if (ops == NULL || ops->init == NULL)
 		return NULL;
 
diff --git a/drivers/net/nfp/nfpcore/nfp_crc.c b/drivers/net/nfp/nfpcore/nfp_crc.c
index 68f27f8c68..986c52711d 100644
--- a/drivers/net/nfp/nfpcore/nfp_crc.c
+++ b/drivers/net/nfp/nfpcore/nfp_crc.c
@@ -15,11 +15,13 @@ nfp_crc32_be_generic(uint32_t crc,
 		uint32_t polynomial)
 {
 	uint32_t i;
+
 	while (len--) {
 		crc ^= *p++ << 24;
 		for (i = 0; i < 8; i++)
 			crc = (crc << 1) ^ ((crc & 0x80000000) ? polynomial : 0);
 	}
+
 	return crc;
 }
 
diff --git a/drivers/net/nfp/nfpcore/nfp_hwinfo.c b/drivers/net/nfp/nfpcore/nfp_hwinfo.c
index 7abf9c7700..cee37210b0 100644
--- a/drivers/net/nfp/nfpcore/nfp_hwinfo.c
+++ b/drivers/net/nfp/nfpcore/nfp_hwinfo.c
@@ -54,6 +54,7 @@ nfp_hwinfo_db_walk(struct nfp_hwinfo *hwinfo,
 			return -EINVAL;
 		}
 	}
+
 	return 0;
 }
 
@@ -178,6 +179,7 @@ nfp_hwinfo_read(struct nfp_cpp *cpp)
 		rte_free(db);
 		return NULL;
 	}
+
 	return db;
 }
 
diff --git a/drivers/net/nfp/nfpcore/nfp_hwinfo.h b/drivers/net/nfp/nfpcore/nfp_hwinfo.h
index 424db8035d..37427bb6c8 100644
--- a/drivers/net/nfp/nfpcore/nfp_hwinfo.h
+++ b/drivers/net/nfp/nfpcore/nfp_hwinfo.h
@@ -8,33 +8,31 @@
 
 #include <inttypes.h>
 
-#define HWINFO_SIZE_MIN	0x100
+#define HWINFO_SIZE_MIN    0x100
 
 /*
  * The Hardware Info Table defines the properties of the system.
  *
  * HWInfo v1 Table (fixed size)
  *
- * 0x0000: uint32_t version	        Hardware Info Table version (1.0)
- * 0x0004: uint32_t size	        Total size of the table, including the
- *					CRC32 (IEEE 802.3)
- * 0x0008: uint32_t jumptab	        Offset of key/value table
- * 0x000c: uint32_t keys	        Total number of keys in the key/value
- *					table
- * NNNNNN:				Key/value jump table and string data
- * (size - 4): uint32_t crc32	CRC32 (same as IEEE 802.3, POSIX csum, etc)
- *				CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE
+ * 0x0000: uint32_t version        Hardware Info Table version (1.0)
+ * 0x0004: uint32_t size           Total size of the table, including the
+ *                                     CRC32 (IEEE 802.3)
+ * 0x0008: uint32_t jumptab        Offset of key/value table
+ * 0x000c: uint32_t keys           Total number of keys in the key/value table
+ * NNNNNN:                         Key/value jump table and string data
+ * (size - 4): uint32_t crc32      CRC32 (same as IEEE 802.3, POSIX csum, etc)
+ *                                     CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE
  *
  * HWInfo v2 Table (variable size)
  *
- * 0x0000: uint32_t version	        Hardware Info Table version (2.0)
- * 0x0004: uint32_t size	        Current size of the data area, excluding
- *					CRC32
- * 0x0008: uint32_t limit	        Maximum size of the table
- * 0x000c: uint32_t reserved	        Unused, set to zero
- * NNNNNN:			Key/value data
- * (size - 4): uint32_t crc32	CRC32 (same as IEEE 802.3, POSIX csum, etc)
- *				CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE
+ * 0x0000: uint32_t version        Hardware Info Table version (2.0)
+ * 0x0004: uint32_t size           Current size of the data area, excluding CRC32
+ * 0x0008: uint32_t limit          Maximum size of the table
+ * 0x000c: uint32_t reserved       Unused, set to zero
+ * NNNNNN:                         Key/value data
+ * (size - 4): uint32_t crc32      CRC32 (same as IEEE 802.3, POSIX csum, etc)
+ *                                     CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE
  *
  * If the HWInfo table is in the process of being updated, the low bit of
  * version will be set.
@@ -47,17 +45,16 @@
  *
  *  All keys are guaranteed to be unique.
  *
- * N+0:	uint32_t key_1		Offset to the first key
- * N+4:	uint32_t val_1		Offset to the first value
- * N+8: uint32_t key_2		Offset to the second key
- * N+c: uint32_t val_2		Offset to the second value
+ * N+0: uint32_t key_1        Offset to the first key
+ * N+4: uint32_t val_1        Offset to the first value
+ * N+8: uint32_t key_2        Offset to the second key
+ * N+c: uint32_t val_2        Offset to the second value
  * ...
  *
  * HWInfo v2 Key/Value Table
  * -------------------------
  *
  * Packed UTF8Z strings, ie 'key1\000value1\000key2\000value2\000'
- *
  * Unsorted.
  *
  * Note: Only the HwInfo v2 Table be supported now.
@@ -65,7 +62,7 @@
 
 #define NFP_HWINFO_VERSION_1 ('H' << 24 | 'I' << 16 | 1 << 8 | 0 << 1 | 0)
 #define NFP_HWINFO_VERSION_2 ('H' << 24 | 'I' << 16 | 2 << 8 | 0 << 1 | 0)
-#define NFP_HWINFO_VERSION_UPDATING	RTE_BIT32(0)
+#define NFP_HWINFO_VERSION_UPDATING    RTE_BIT32(0)
 
 struct nfp_hwinfo {
 	uint8_t start[0];
diff --git a/drivers/net/nfp/nfpcore/nfp_mip.c b/drivers/net/nfp/nfpcore/nfp_mip.c
index 3c59582846..f6f07ac739 100644
--- a/drivers/net/nfp/nfpcore/nfp_mip.c
+++ b/drivers/net/nfp/nfpcore/nfp_mip.c
@@ -11,9 +11,9 @@
 #include "nfp_mip.h"
 #include "nfp_nffw.h"
 
-#define NFP_MIP_SIGNATURE	rte_cpu_to_le_32(0x0050494d)  /* "MIP\0" */
-#define NFP_MIP_VERSION		rte_cpu_to_le_32(1)
-#define NFP_MIP_MAX_OFFSET	(256 * 1024)
+#define NFP_MIP_SIGNATURE        rte_cpu_to_le_32(0x0050494d)  /* "MIP\0" */
+#define NFP_MIP_VERSION          rte_cpu_to_le_32(1)
+#define NFP_MIP_MAX_OFFSET       (256 * 1024)
 
 struct nfp_mip {
 	uint32_t signature;
@@ -49,11 +49,13 @@ nfp_mip_try_read(struct nfp_cpp *cpp,
 		PMD_DRV_LOG(ERR, "Failed to read MIP data");
 		return -EIO;
 	}
+
 	if (mip->signature != NFP_MIP_SIGNATURE) {
 		PMD_DRV_LOG(ERR, "Incorrect MIP signature %#08x",
 				rte_le_to_cpu_32(mip->signature));
 		return -EINVAL;
 	}
+
 	if (mip->mip_version != NFP_MIP_VERSION) {
 		PMD_DRV_LOG(ERR, "Unsupported MIP version %d",
 				rte_le_to_cpu_32(mip->mip_version));
@@ -82,6 +84,7 @@ nfp_mip_read_resource(struct nfp_cpp *cpp,
 		goto exit_close_nffw;
 
 	err = nfp_mip_try_read(cpp, cpp_id, addr, mip);
+
 exit_close_nffw:
 	nfp_nffw_info_close(nffw_info);
 	return err;
diff --git a/drivers/net/nfp/nfpcore/nfp_mip.h b/drivers/net/nfp/nfpcore/nfp_mip.h
index 980abc2517..16824a6769 100644
--- a/drivers/net/nfp/nfpcore/nfp_mip.h
+++ b/drivers/net/nfp/nfpcore/nfp_mip.h
@@ -18,4 +18,5 @@ void nfp_mip_symtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size);
 void nfp_mip_strtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size);
 int nfp_nffw_info_mip_first(struct nfp_nffw_info *state, uint32_t *cpp_id,
 		uint64_t *off);
+
 #endif
diff --git a/drivers/net/nfp/nfpcore/nfp_mutex.c b/drivers/net/nfp/nfpcore/nfp_mutex.c
index 5392924cf0..61c491e07e 100644
--- a/drivers/net/nfp/nfpcore/nfp_mutex.c
+++ b/drivers/net/nfp/nfpcore/nfp_mutex.c
@@ -85,7 +85,7 @@ nfp_cpp_mutex_init(struct nfp_cpp *cpp,
 {
 	int err;
 	uint32_t model = nfp_cpp_model(cpp);
-	uint32_t muw = NFP_CPP_ID(target, 4, 0);	/* atomic_write */
+	uint32_t muw = NFP_CPP_ID(target, 4, 0);    /* atomic_write */
 
 	err = _nfp_cpp_mutex_validate(model, &target, address);
 	if (err < 0)
@@ -134,7 +134,7 @@ nfp_cpp_mutex_alloc(struct nfp_cpp *cpp,
 	uint32_t tmp;
 	struct nfp_cpp_mutex *mutex;
 	uint32_t model = nfp_cpp_model(cpp);
-	uint32_t mur = NFP_CPP_ID(target, 3, 0);	/* atomic_read */
+	uint32_t mur = NFP_CPP_ID(target, 3, 0);    /* atomic_read */
 
 	/* Look for cached mutex */
 	for (mutex = cpp->mutex_cache; mutex; mutex = mutex->next) {
@@ -231,12 +231,15 @@ nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex)
 		/* If err != -EBUSY, then the lock was damaged */
 		if (err < 0 && err != -EBUSY)
 			return err;
+
 		if (time(NULL) >= warn_at) {
 			PMD_DRV_LOG(WARNING, "Waiting for NFP mutex...");
 			warn_at = time(NULL) + 60;
 		}
+
 		sched_yield();
 	}
+
 	return 0;
 }
 
@@ -257,8 +260,8 @@ nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex)
 	uint32_t value;
 	struct nfp_cpp *cpp = mutex->cpp;
 	uint16_t interface = nfp_cpp_interface(cpp);
-	uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0);	/* atomic_write */
-	uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0);	/* atomic_read */
+	uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0);    /* atomic_write */
+	uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0);    /* atomic_read */
 
 	if (mutex->depth > 1) {
 		mutex->depth--;
@@ -314,9 +317,9 @@ nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex)
 	uint32_t tmp;
 	uint32_t value;
 	struct nfp_cpp *cpp = mutex->cpp;
-	uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0);	/* atomic_read */
-	uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0);	/* atomic_write */
-	uint32_t mus = NFP_CPP_ID(mutex->target, 5, 3);	/* test_set_imm */
+	uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0);    /* atomic_read */
+	uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0);    /* atomic_write */
+	uint32_t mus = NFP_CPP_ID(mutex->target, 5, 3);    /* test_set_imm */
 
 	if (mutex->depth > 0) {
 		if (mutex->depth == MUTEX_DEPTH_MAX)
diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.c b/drivers/net/nfp/nfpcore/nfp_nffw.c
index 038f19c261..0ae7d9328c 100644
--- a/drivers/net/nfp/nfpcore/nfp_nffw.c
+++ b/drivers/net/nfp/nfpcore/nfp_nffw.c
@@ -61,10 +61,10 @@ nffw_fwinfo_mip_offset_get(const struct nffw_fwinfo *fi)
 	return (mip_off_hi & 0xFF) << 32 | fi->mip_offset_lo;
 }
 
-#define NFP_IMB_TGTADDRESSMODECFG_MODE_of(_x)		(((_x) >> 13) & 0x7)
-#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE		RTE_BIT32(12)
-#define   NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_32_BIT	0
-#define   NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT	RTE_BIT32(12)
+#define NFP_IMB_TGTADDRESSMODECFG_MODE_of(_x)           (((_x) >> 13) & 0x7)
+#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE              RTE_BIT32(12)
+#define   NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_32_BIT     0
+#define   NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT     RTE_BIT32(12)
 
 static int
 nfp_mip_mu_locality_lsb(struct nfp_cpp *cpp)
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.c b/drivers/net/nfp/nfpcore/nfp_nsp.c
index dd2d19936d..9bb344aa5f 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp.c
@@ -290,6 +290,7 @@ nfp_nsp_command(struct nfp_nsp *state,
 	err = nfp_cpp_readq(cpp, nsp_cpp, nsp_command, &ret_val);
 	if (err < 0)
 		return err;
+
 	ret_val = FIELD_GET(NSP_COMMAND_OPTION, ret_val);
 
 	err = FIELD_GET(NSP_STATUS_RESULT, reg);
@@ -354,6 +355,7 @@ nfp_nsp_command_buf(struct nfp_nsp *nsp,
 		if (err < 0)
 			return err;
 	}
+
 	/* Zero out remaining part of the buffer */
 	if (out_buf != NULL && out_size > 0 && out_size > in_size) {
 		memset(out_buf, 0, out_size - in_size);
@@ -400,6 +402,7 @@ nfp_nsp_wait(struct nfp_nsp *state)
 			break;
 		}
 	}
+
 	if (err != 0)
 		PMD_DRV_LOG(ERR, "NSP failed to respond %d", err);
 
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h
index 0fcb21e99c..ee58bf33b8 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp.h
+++ b/drivers/net/nfp/nfpcore/nfp_nsp.h
@@ -10,73 +10,72 @@
 #include "nfp_nsp.h"
 
 #define GENMASK_ULL(h, l) \
-	(((~0ULL) - (1ULL << (l)) + 1) & \
-	 (~0ULL >> (64 - 1 - (h))))
+	(((~0ULL) - (1ULL << (l)) + 1) & (~0ULL >> (64 - 1 - (h))))
 
 #define __bf_shf(x) (__builtin_ffsll(x) - 1)
 
-#define FIELD_GET(_mask, _reg)	\
+#define FIELD_GET(_mask, _reg) \
 	(__extension__ ({ \
 		typeof(_mask) _x = (_mask); \
-		(typeof(_x))(((_reg) & (_x)) >> __bf_shf(_x));	\
+		(typeof(_x))(((_reg) & (_x)) >> __bf_shf(_x)); \
 	}))
 
-#define FIELD_FIT(_mask, _val)						\
+#define FIELD_FIT(_mask, _val) \
 	(__extension__ ({ \
 		typeof(_mask) _x = (_mask); \
 		!((((typeof(_x))_val) << __bf_shf(_x)) & ~(_x)); \
 	}))
 
-#define FIELD_PREP(_mask, _val)						\
+#define FIELD_PREP(_mask, _val) \
 	(__extension__ ({ \
 		typeof(_mask) _x = (_mask); \
-		((typeof(_x))(_val) << __bf_shf(_x)) & (_x);	\
+		((typeof(_x))(_val) << __bf_shf(_x)) & (_x); \
 	}))
 
 /* Offsets relative to the CSR base */
-#define NSP_STATUS		0x00
-#define   NSP_STATUS_MAGIC	GENMASK_ULL(63, 48)
-#define   NSP_STATUS_MAJOR	GENMASK_ULL(47, 44)
-#define   NSP_STATUS_MINOR	GENMASK_ULL(43, 32)
-#define   NSP_STATUS_CODE	GENMASK_ULL(31, 16)
-#define   NSP_STATUS_RESULT	GENMASK_ULL(15, 8)
-#define   NSP_STATUS_BUSY	RTE_BIT64(0)
-
-#define NSP_COMMAND		0x08
-#define   NSP_COMMAND_OPTION	GENMASK_ULL(63, 32)
-#define   NSP_COMMAND_CODE	GENMASK_ULL(31, 16)
-#define   NSP_COMMAND_START	RTE_BIT64(0)
+#define NSP_STATUS              0x00
+#define   NSP_STATUS_MAGIC      GENMASK_ULL(63, 48)
+#define   NSP_STATUS_MAJOR      GENMASK_ULL(47, 44)
+#define   NSP_STATUS_MINOR      GENMASK_ULL(43, 32)
+#define   NSP_STATUS_CODE       GENMASK_ULL(31, 16)
+#define   NSP_STATUS_RESULT     GENMASK_ULL(15, 8)
+#define   NSP_STATUS_BUSY       RTE_BIT64(0)
+
+#define NSP_COMMAND             0x08
+#define   NSP_COMMAND_OPTION    GENMASK_ULL(63, 32)
+#define   NSP_COMMAND_CODE      GENMASK_ULL(31, 16)
+#define   NSP_COMMAND_START     RTE_BIT64(0)
 
 /* CPP address to retrieve the data from */
-#define NSP_BUFFER		0x10
-#define   NSP_BUFFER_CPP	GENMASK_ULL(63, 40)
-#define   NSP_BUFFER_PCIE	GENMASK_ULL(39, 38)
-#define   NSP_BUFFER_ADDRESS	GENMASK_ULL(37, 0)
+#define NSP_BUFFER              0x10
+#define   NSP_BUFFER_CPP        GENMASK_ULL(63, 40)
+#define   NSP_BUFFER_PCIE       GENMASK_ULL(39, 38)
+#define   NSP_BUFFER_ADDRESS    GENMASK_ULL(37, 0)
 
-#define NSP_DFLT_BUFFER		0x18
+#define NSP_DFLT_BUFFER         0x18
 
-#define NSP_DFLT_BUFFER_CONFIG	0x20
-#define   NSP_DFLT_BUFFER_SIZE_MB	GENMASK_ULL(7, 0)
+#define NSP_DFLT_BUFFER_CONFIG 0x20
+#define   NSP_DFLT_BUFFER_SIZE_MB    GENMASK_ULL(7, 0)
 
-#define NSP_MAGIC		0xab10
-#define NSP_MAJOR		0
-#define NSP_MINOR		8
+#define NSP_MAGIC               0xab10
+#define NSP_MAJOR               0
+#define NSP_MINOR               8
 
-#define NSP_CODE_MAJOR		GENMASK(15, 12)
-#define NSP_CODE_MINOR		GENMASK(11, 0)
+#define NSP_CODE_MAJOR          GENMASK(15, 12)
+#define NSP_CODE_MINOR          GENMASK(11, 0)
 
 enum nfp_nsp_cmd {
-	SPCODE_NOOP		= 0, /* No operation */
-	SPCODE_SOFT_RESET	= 1, /* Soft reset the NFP */
-	SPCODE_FW_DEFAULT	= 2, /* Load default (UNDI) FW */
-	SPCODE_PHY_INIT		= 3, /* Initialize the PHY */
-	SPCODE_MAC_INIT		= 4, /* Initialize the MAC */
-	SPCODE_PHY_RXADAPT	= 5, /* Re-run PHY RX Adaptation */
-	SPCODE_FW_LOAD		= 6, /* Load fw from buffer, len in option */
-	SPCODE_ETH_RESCAN	= 7, /* Rescan ETHs, write ETH_TABLE to buf */
-	SPCODE_ETH_CONTROL	= 8, /* Update media config from buffer */
-	SPCODE_NSP_SENSORS	= 12, /* Read NSP sensor(s) */
-	SPCODE_NSP_IDENTIFY	= 13, /* Read NSP version */
+	SPCODE_NOOP             = 0, /* No operation */
+	SPCODE_SOFT_RESET       = 1, /* Soft reset the NFP */
+	SPCODE_FW_DEFAULT       = 2, /* Load default (UNDI) FW */
+	SPCODE_PHY_INIT         = 3, /* Initialize the PHY */
+	SPCODE_MAC_INIT         = 4, /* Initialize the MAC */
+	SPCODE_PHY_RXADAPT      = 5, /* Re-run PHY RX Adaptation */
+	SPCODE_FW_LOAD          = 6, /* Load fw from buffer, len in option */
+	SPCODE_ETH_RESCAN       = 7, /* Rescan ETHs, write ETH_TABLE to buf */
+	SPCODE_ETH_CONTROL      = 8, /* Update media config from buffer */
+	SPCODE_NSP_SENSORS      = 12, /* Read NSP sensor(s) */
+	SPCODE_NSP_IDENTIFY     = 13, /* Read NSP version */
 };
 
 static const struct {
@@ -123,13 +122,13 @@ nfp_nsp_has_mac_reinit(struct nfp_nsp *state)
 }
 
 enum nfp_eth_interface {
-	NFP_INTERFACE_NONE	= 0,
-	NFP_INTERFACE_SFP	= 1,
-	NFP_INTERFACE_SFPP	= 10,
-	NFP_INTERFACE_SFP28	= 28,
-	NFP_INTERFACE_QSFP	= 40,
-	NFP_INTERFACE_CXP	= 100,
-	NFP_INTERFACE_QSFP28	= 112,
+	NFP_INTERFACE_NONE      = 0,
+	NFP_INTERFACE_SFP       = 1,
+	NFP_INTERFACE_SFPP      = 10,
+	NFP_INTERFACE_SFP28     = 28,
+	NFP_INTERFACE_QSFP      = 40,
+	NFP_INTERFACE_CXP       = 100,
+	NFP_INTERFACE_QSFP28    = 112,
 };
 
 enum nfp_eth_media {
@@ -153,10 +152,10 @@ enum nfp_eth_fec {
 	NFP_FEC_DISABLED_BIT,
 };
 
-#define NFP_FEC_AUTO		RTE_BIT32(NFP_FEC_AUTO_BIT)
-#define NFP_FEC_BASER		RTE_BIT32(NFP_FEC_BASER_BIT)
-#define NFP_FEC_REED_SOLOMON	RTE_BIT32(NFP_FEC_REED_SOLOMON_BIT)
-#define NFP_FEC_DISABLED	RTE_BIT32(NFP_FEC_DISABLED_BIT)
+#define NFP_FEC_AUTO            RTE_BIT32(NFP_FEC_AUTO_BIT)
+#define NFP_FEC_BASER           RTE_BIT32(NFP_FEC_BASER_BIT)
+#define NFP_FEC_REED_SOLOMON    RTE_BIT32(NFP_FEC_REED_SOLOMON_BIT)
+#define NFP_FEC_DISABLED        RTE_BIT32(NFP_FEC_DISABLED_BIT)
 
 /* ETH table information */
 struct nfp_eth_table {
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
index 54e1e2215d..08f12f862c 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c
@@ -105,5 +105,6 @@ nfp_hwmon_read_sensor(struct nfp_cpp *cpp,
 	default:
 		return -EINVAL;
 	}
+
 	return 0;
 }
diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
index a56ea4e068..c01802a516 100644
--- a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
+++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c
@@ -11,70 +11,68 @@
 #include "nfp_nsp.h"
 #include "nfp6000/nfp6000.h"
 
-#define NSP_ETH_NBI_PORT_COUNT		24
-#define NSP_ETH_MAX_COUNT		(2 * NSP_ETH_NBI_PORT_COUNT)
-#define NSP_ETH_TABLE_SIZE		(NSP_ETH_MAX_COUNT *		\
-					 sizeof(union eth_table_entry))
-
-#define NSP_ETH_PORT_LANES		GENMASK_ULL(3, 0)
-#define NSP_ETH_PORT_INDEX		GENMASK_ULL(15, 8)
-#define NSP_ETH_PORT_LABEL		GENMASK_ULL(53, 48)
-#define NSP_ETH_PORT_PHYLABEL		GENMASK_ULL(59, 54)
-#define NSP_ETH_PORT_FEC_SUPP_BASER	RTE_BIT64(60)
-#define NSP_ETH_PORT_FEC_SUPP_RS	RTE_BIT64(61)
-
-#define NSP_ETH_PORT_LANES_MASK		rte_cpu_to_le_64(NSP_ETH_PORT_LANES)
-
-#define NSP_ETH_STATE_CONFIGURED	RTE_BIT64(0)
-#define NSP_ETH_STATE_ENABLED		RTE_BIT64(1)
-#define NSP_ETH_STATE_TX_ENABLED	RTE_BIT64(2)
-#define NSP_ETH_STATE_RX_ENABLED	RTE_BIT64(3)
-#define NSP_ETH_STATE_RATE		GENMASK_ULL(11, 8)
-#define NSP_ETH_STATE_INTERFACE		GENMASK_ULL(19, 12)
-#define NSP_ETH_STATE_MEDIA		GENMASK_ULL(21, 20)
-#define NSP_ETH_STATE_OVRD_CHNG		RTE_BIT64(22)
-#define NSP_ETH_STATE_ANEG		GENMASK_ULL(25, 23)
-#define NSP_ETH_STATE_FEC		GENMASK_ULL(27, 26)
-
-#define NSP_ETH_CTRL_CONFIGURED		RTE_BIT64(0)
-#define NSP_ETH_CTRL_ENABLED		RTE_BIT64(1)
-#define NSP_ETH_CTRL_TX_ENABLED		RTE_BIT64(2)
-#define NSP_ETH_CTRL_RX_ENABLED		RTE_BIT64(3)
-#define NSP_ETH_CTRL_SET_RATE		RTE_BIT64(4)
-#define NSP_ETH_CTRL_SET_LANES		RTE_BIT64(5)
-#define NSP_ETH_CTRL_SET_ANEG		RTE_BIT64(6)
-#define NSP_ETH_CTRL_SET_FEC		RTE_BIT64(7)
+#define NSP_ETH_NBI_PORT_COUNT          24
+#define NSP_ETH_MAX_COUNT               (2 * NSP_ETH_NBI_PORT_COUNT)
+#define NSP_ETH_TABLE_SIZE              (NSP_ETH_MAX_COUNT * sizeof(union eth_table_entry))
+
+#define NSP_ETH_PORT_LANES              GENMASK_ULL(3, 0)
+#define NSP_ETH_PORT_INDEX              GENMASK_ULL(15, 8)
+#define NSP_ETH_PORT_LABEL              GENMASK_ULL(53, 48)
+#define NSP_ETH_PORT_PHYLABEL           GENMASK_ULL(59, 54)
+#define NSP_ETH_PORT_FEC_SUPP_BASER     RTE_BIT64(60)
+#define NSP_ETH_PORT_FEC_SUPP_RS        RTE_BIT64(61)
+
+#define NSP_ETH_PORT_LANES_MASK         rte_cpu_to_le_64(NSP_ETH_PORT_LANES)
+
+#define NSP_ETH_STATE_CONFIGURED        RTE_BIT64(0)
+#define NSP_ETH_STATE_ENABLED           RTE_BIT64(1)
+#define NSP_ETH_STATE_TX_ENABLED        RTE_BIT64(2)
+#define NSP_ETH_STATE_RX_ENABLED        RTE_BIT64(3)
+#define NSP_ETH_STATE_RATE              GENMASK_ULL(11, 8)
+#define NSP_ETH_STATE_INTERFACE         GENMASK_ULL(19, 12)
+#define NSP_ETH_STATE_MEDIA             GENMASK_ULL(21, 20)
+#define NSP_ETH_STATE_OVRD_CHNG         RTE_BIT64(22)
+#define NSP_ETH_STATE_ANEG              GENMASK_ULL(25, 23)
+#define NSP_ETH_STATE_FEC               GENMASK_ULL(27, 26)
+
+#define NSP_ETH_CTRL_CONFIGURED         RTE_BIT64(0)
+#define NSP_ETH_CTRL_ENABLED            RTE_BIT64(1)
+#define NSP_ETH_CTRL_TX_ENABLED         RTE_BIT64(2)
+#define NSP_ETH_CTRL_RX_ENABLED         RTE_BIT64(3)
+#define NSP_ETH_CTRL_SET_RATE           RTE_BIT64(4)
+#define NSP_ETH_CTRL_SET_LANES          RTE_BIT64(5)
+#define NSP_ETH_CTRL_SET_ANEG           RTE_BIT64(6)
+#define NSP_ETH_CTRL_SET_FEC            RTE_BIT64(7)
 
 /* Which connector port. */
-#define PORT_TP			0x00
-#define PORT_AUI		0x01
-#define PORT_MII		0x02
-#define PORT_FIBRE		0x03
-#define PORT_BNC		0x04
-#define PORT_DA			0x05
-#define PORT_NONE		0xef
-#define PORT_OTHER		0xff
-
-#define SPEED_10		10
-#define SPEED_100		100
-#define SPEED_1000		1000
-#define SPEED_2500		2500
-#define SPEED_5000		5000
-#define SPEED_10000		10000
-#define SPEED_14000		14000
-#define SPEED_20000		20000
-#define SPEED_25000		25000
-#define SPEED_40000		40000
-#define SPEED_50000		50000
-#define SPEED_56000		56000
-#define SPEED_100000		100000
+#define PORT_TP                 0x00
+#define PORT_AUI                0x01
+#define PORT_MII                0x02
+#define PORT_FIBRE              0x03
+#define PORT_BNC                0x04
+#define PORT_DA                 0x05
+#define PORT_NONE               0xef
+#define PORT_OTHER              0xff
+
+#define SPEED_10                10
+#define SPEED_100               100
+#define SPEED_1000              1000
+#define SPEED_2500              2500
+#define SPEED_5000              5000
+#define SPEED_10000             10000
+#define SPEED_14000             14000
+#define SPEED_20000             20000
+#define SPEED_25000             25000
+#define SPEED_40000             40000
+#define SPEED_50000             50000
+#define SPEED_56000             56000
+#define SPEED_100000            100000
 
 enum nfp_eth_raw {
 	NSP_ETH_RAW_PORT = 0,
 	NSP_ETH_RAW_STATE,
 	NSP_ETH_RAW_MAC,
 	NSP_ETH_RAW_CONTROL,
-
 	NSP_ETH_NUM_RAW
 };
 
@@ -102,12 +100,12 @@ static const struct {
 	enum nfp_eth_rate rate;
 	uint32_t speed;
 } nsp_eth_rate_tbl[] = {
-	{ RATE_INVALID,	0, },
-	{ RATE_10M,	SPEED_10, },
-	{ RATE_100M,	SPEED_100, },
-	{ RATE_1G,	SPEED_1000, },
-	{ RATE_10G,	SPEED_10000, },
-	{ RATE_25G,	SPEED_25000, },
+	{ RATE_INVALID, 0, },
+	{ RATE_10M,     SPEED_10, },
+	{ RATE_100M,    SPEED_100, },
+	{ RATE_1G,      SPEED_1000, },
+	{ RATE_10G,     SPEED_10000, },
+	{ RATE_25G,     SPEED_25000, },
 };
 
 static uint32_t
@@ -212,10 +210,12 @@ nfp_eth_calc_port_geometry(struct nfp_eth_table *table)
 			if (table->ports[i].label_port !=
 					table->ports[j].label_port)
 				continue;
+
 			table->ports[i].port_lanes += table->ports[j].lanes;
 
 			if (i == j)
 				continue;
+
 			if (table->ports[i].label_subport ==
 					table->ports[j].label_subport)
 				PMD_DRV_LOG(DEBUG, "Port %d subport %d is a duplicate",
@@ -553,11 +553,11 @@ nfp_eth_set_bit_config(struct nfp_nsp *nsp,
 	return 0;
 }
 
-#define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit)	\
-	(__extension__ ({ \
-		typeof(mask) _x = (mask); \
+#define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit)      \
+	(__extension__ ({                                              \
+		typeof(mask) _x = (mask);                              \
 		nfp_eth_set_bit_config(nsp, raw_idx, _x, __bf_shf(_x), \
-				val, ctrl_bit);			\
+				val, ctrl_bit);                        \
 	}))
 
 /**
diff --git a/drivers/net/nfp/nfpcore/nfp_resource.c b/drivers/net/nfp/nfpcore/nfp_resource.c
index 8ba3784f8a..e7e232eb4e 100644
--- a/drivers/net/nfp/nfpcore/nfp_resource.c
+++ b/drivers/net/nfp/nfpcore/nfp_resource.c
@@ -13,14 +13,14 @@
 #include "nfp_resource.h"
 #include "nfp_crc.h"
 
-#define NFP_RESOURCE_TBL_TARGET		NFP_CPP_TARGET_MU
-#define NFP_RESOURCE_TBL_BASE		0x8100000000ULL
+#define NFP_RESOURCE_TBL_TARGET         NFP_CPP_TARGET_MU
+#define NFP_RESOURCE_TBL_BASE           0x8100000000ULL
 
 /* NFP Resource Table self-identifier */
-#define NFP_RESOURCE_TBL_NAME		"nfp.res"
-#define NFP_RESOURCE_TBL_KEY		0x00000000 /* Special key for entry 0 */
+#define NFP_RESOURCE_TBL_NAME           "nfp.res"
+#define NFP_RESOURCE_TBL_KEY            0x00000000 /* Special key for entry 0 */
 
-#define NFP_RESOURCE_ENTRY_NAME_SZ	8
+#define NFP_RESOURCE_ENTRY_NAME_SZ      8
 
 /* Resource table entry */
 struct nfp_resource_entry {
@@ -42,9 +42,9 @@ struct nfp_resource_entry {
 	} region;
 };
 
-#define NFP_RESOURCE_TBL_SIZE		4096
-#define NFP_RESOURCE_TBL_ENTRIES	(int)(NFP_RESOURCE_TBL_SIZE /	\
-					 sizeof(struct nfp_resource_entry))
+#define NFP_RESOURCE_TBL_SIZE       4096
+#define NFP_RESOURCE_TBL_ENTRIES    (int)(NFP_RESOURCE_TBL_SIZE /        \
+					sizeof(struct nfp_resource_entry))
 
 struct nfp_resource {
 	char name[NFP_RESOURCE_ENTRY_NAME_SZ + 1];
@@ -75,6 +75,7 @@ nfp_cpp_resource_find(struct nfp_cpp *cpp,
 		PMD_DRV_LOG(ERR, "Grabbing device lock not supported");
 		return -EOPNOTSUPP;
 	}
+
 	key = nfp_crc32_posix(name_pad, NFP_RESOURCE_ENTRY_NAME_SZ);
 
 	for (i = 0; i < NFP_RESOURCE_TBL_ENTRIES; i++) {
@@ -96,6 +97,7 @@ nfp_cpp_resource_find(struct nfp_cpp *cpp,
 				entry.region.cpp_token);
 		res->addr = ((uint64_t)entry.region.page_offset) << 8;
 		res->size = (uint64_t)entry.region.page_size << 8;
+
 		return 0;
 	}
 
diff --git a/drivers/net/nfp/nfpcore/nfp_rtsym.c b/drivers/net/nfp/nfpcore/nfp_rtsym.c
index 0e6c0f9fe1..37811ceaeb 100644
--- a/drivers/net/nfp/nfpcore/nfp_rtsym.c
+++ b/drivers/net/nfp/nfpcore/nfp_rtsym.c
@@ -17,18 +17,18 @@
 #include "nfp6000/nfp6000.h"
 
 /* These need to match the linker */
-#define SYM_TGT_LMEM		0
-#define SYM_TGT_EMU_CACHE	0x17
+#define SYM_TGT_LMEM            0
+#define SYM_TGT_EMU_CACHE       0x17
 
 struct nfp_rtsym_entry {
-	uint8_t	type;
-	uint8_t	target;
-	uint8_t	island;
-	uint8_t	addr_hi;
+	uint8_t type;
+	uint8_t target;
+	uint8_t island;
+	uint8_t addr_hi;
 	uint32_t addr_lo;
 	uint16_t name;
-	uint8_t	menum;
-	uint8_t	size_hi;
+	uint8_t menum;
+	uint8_t size_hi;
 	uint32_t size_lo;
 };
 
diff --git a/drivers/net/nfp/nfpcore/nfp_rtsym.h b/drivers/net/nfp/nfpcore/nfp_rtsym.h
index ff1facbd17..de1966f04b 100644
--- a/drivers/net/nfp/nfpcore/nfp_rtsym.h
+++ b/drivers/net/nfp/nfpcore/nfp_rtsym.h
@@ -57,4 +57,5 @@ uint64_t nfp_rtsym_read_le(struct nfp_rtsym_table *rtbl, const char *name,
 		int *error);
 uint8_t *nfp_rtsym_map(struct nfp_rtsym_table *rtbl, const char *name,
 		uint32_t min_size, struct nfp_cpp_area **area);
+
 #endif
