From patchwork Tue Sep 19 08:49:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjun Wu X-Patchwork-Id: 131594 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18377425FC; Tue, 19 Sep 2023 10:44:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 044C540695; Tue, 19 Sep 2023 10:44:13 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id C92EC402DA for ; Tue, 19 Sep 2023 10:44:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695113051; x=1726649051; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jlvok9N2D79FGaWRf528Ld2yBYhRLh0/HHekFEJMuvA=; b=IXR/PuH87qmCBsnaVdrKpvV4PT1920wpR2qjfswph4IF3bUSa4fXL6Fg NMSwc+41v0qZTsAPwLjmEy0CEQuqfYl9coCJAkdknffDyCRikFpP3BjWt qu8d2FDKh7xdqgA1vweW/wqxcGeS1e3PcCSBy2/FlYRuffM46wMi7hfUz cC319yyqobtkoe8k2XrZ8PPy5gkgoCcJIZPLBBX4MhdqT0/nBecNJqIpq 1flNzLhtkFhlYQdImLOGQLdeioCZq/HU/yqZZPkz4J8hzE4UsmDas4Izu NQ7emZko6+HsGfL4mLHQeP+3IM7ynboyEKkRf+ZoYTR+IdRcDtsniDa+I w==; X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="364933792" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="364933792" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 01:44:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10837"; a="993083453" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="993083453" Received: from dpdk-wuwenjun-icelake-ii.sh.intel.com ([10.67.110.152]) by fmsmga006.fm.intel.com with ESMTP; 19 Sep 2023 01:44:09 -0700 From: Wenjun Wu To: dev@dpdk.org, yuying.zhang@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: Wenjun Wu Subject: [PATCH v2] net/cpfl: fix datapath function configuration Date: Tue, 19 Sep 2023 16:49:44 +0800 Message-Id: <20230919084944.230177-1-wenjun1.wu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230919083237.171374-1-wenjun1.wu@intel.com> References: <20230919083237.171374-1-wenjun1.wu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Vector datapath is not support any advanced features for now, so disable vector path if TX checksum offload or RX scatter is enabled. Fixes: 2f39845891e6 ("net/cpfl: add AVX512 data path for single queue model") Signed-off-by: Wenjun Wu --- v2: disable vector path for scatter cases. --- drivers/net/cpfl/cpfl_rxtx_vec_common.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/cpfl/cpfl_rxtx_vec_common.h b/drivers/net/cpfl/cpfl_rxtx_vec_common.h index d8e9191196..479e1ddcb9 100644 --- a/drivers/net/cpfl/cpfl_rxtx_vec_common.h +++ b/drivers/net/cpfl/cpfl_rxtx_vec_common.h @@ -25,7 +25,11 @@ RTE_ETH_RX_OFFLOAD_TIMESTAMP) #define CPFL_TX_NO_VECTOR_FLAGS ( \ RTE_ETH_TX_OFFLOAD_TCP_TSO | \ - RTE_ETH_TX_OFFLOAD_MULTI_SEGS) + RTE_ETH_TX_OFFLOAD_MULTI_SEGS | \ + RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \ + RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | \ + RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \ + RTE_ETH_TX_OFFLOAD_TCP_CKSUM) static inline int cpfl_rx_vec_queue_default(struct idpf_rx_queue *rxq) @@ -81,6 +85,9 @@ cpfl_rx_vec_dev_check_default(struct rte_eth_dev *dev) struct cpfl_rx_queue *cpfl_rxq; int i, default_ret, splitq_ret, ret = CPFL_SCALAR_PATH; + if (dev->data->scattered_rx) + return CPFL_SCALAR_PATH; + for (i = 0; i < dev->data->nb_rx_queues; i++) { cpfl_rxq = dev->data->rx_queues[i]; default_ret = cpfl_rx_vec_queue_default(&cpfl_rxq->base);