From patchwork Mon Sep 25 10:33:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 131869 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 103EF42630; Mon, 25 Sep 2023 04:13:47 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2FDC54067C; Mon, 25 Sep 2023 04:13:27 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id D6CF1402EB for ; Mon, 25 Sep 2023 04:13:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695608006; x=1727144006; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hRJ87j7JhZJmVzcXpMOOQmLoDs4hIPpXgRWI+H/LEHU=; b=JBlWgokihKjA3D5Po4tWmAf66eL8S+kqYBamjfROEZqc6z8tnko3R1WC XoQv42/UDH46YxsO9x7KUrqZkN/svdN1oS9tSFB2LprOaTgwev/rZHjxS rzA4gWk6sc0QnAEQx2F417qjKvBgJQxTc7C+V0pKDtyHvk2PKxlSL8eXs FtvuAFZn5tyu1t4ta0hkAvudX+vfTqsuLj8Cw+DOO5kjT9F2pZK0t37ql iVzoKt1MYgkgHScAMXda/wT6BSfpE7GsMLm6XF2817GZDWaRpiZKJo6W4 zNxBDkTfvIjJbwEBasd1furQWqO8D/cdq5LqdckFSSj6eqKp+LyeDXQxa w==; X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="384978684" X-IronPort-AV: E=Sophos;i="6.03,174,1694761200"; d="scan'208";a="384978684" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2023 19:13:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="777501969" X-IronPort-AV: E=Sophos;i="6.03,174,1694761200"; d="scan'208";a="777501969" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37]) by orsmga008.jf.intel.com with ESMTP; 24 Sep 2023 19:13:23 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: zhichaox.zeng@intel.com, dev@dpdk.org, Qi Zhang Subject: [PATCH v4 5/5] doc: add generic flow doc for ice PMD Date: Mon, 25 Sep 2023 06:33:24 -0400 Message-Id: <20230925103324.4137053-6-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230925103324.4137053-1-qi.z.zhang@intel.com> References: <20230814202616.3346652-1-qi.z.zhang@intel.com> <20230925103324.4137053-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add some document about how to use rte_flow on ice PMD. Signed-off-by: Qi Zhang --- doc/guides/nics/ice.rst | 45 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index 5a47109c3f..b36a4c260a 100644 --- a/doc/guides/nics/ice.rst +++ b/doc/guides/nics/ice.rst @@ -301,6 +301,51 @@ The DCF PMD needs to advertise and acquire DCF capability which allows DCF to send AdminQ commands that it would like to execute over to the PF and receive responses for the same from PF. +Generic Flow Support +~~~~~~~~~~~~~~~~~~~~ + +The ice PMD provides support for the Generic Flow API (RTE_FLOW), enabling +users to offload various flow classification tasks to the E810 NIC. +The E810 NIC's packet processing pipeline consists of the following stages: + +Switch: Supports exact match and limited wildcard matching with a large flow +capacity. + +ACL: Supports wildcard matching with a smaller flow capacity (DCF mode only). + +FDIR: Supports exact match with a large flow capacity (PF mode only). + +Hash: Supports RSS (PF mode only) + +The ice PMD utilizes the ice_flow_engine structure to represent each of these +stages and leverages the rte_flow rule's ``group`` attribute for selecting the +appropriate engine for Switch, ACL, and FDIR operations: + +Group 0 maps to Switch +Group 1 maps to ACL +Group 2 maps to FDIR + +In the case of RSS, it will only be selected if a ``RTE_FLOW_ACTION_RSS`` action +is targeted to no queue group, and the group attribute is ignored. + +For each engine, a list of supported patterns is maintained in a global array +named ``ice__supported_pattern``. The Ice PMD will reject any rule with +a pattern that is not included in the supported list. + +One notable feature is the ice PMD's ability to leverage the Raw pattern, +enabling protocol-agnostic flow offloading. Here is an example of creating +a rule that matches an IPv4 destination address of 1.2.3.4 and redirects it to +queue 3 using a raw pattern: + +flow create 0 ingress group 2 pattern raw \ +pattern spec \ +00000000000000000000000008004500001400004000401000000000000001020304 \ +pattern mask \ +000000000000000000000000000000000000000000000000000000000000ffffffff \ +end actions queue index 3 / mark id 3 / end + +Currently, raw pattern support is limited to the FDIR and Hash engines. + Additional Options ++++++++++++++++++