From patchwork Tue Oct 3 18:39:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 132286 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E8D80426B1; Tue, 3 Oct 2023 20:40:19 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BF39D40297; Tue, 3 Oct 2023 20:40:19 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4536940262; Tue, 3 Oct 2023 20:40:18 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 393EKsB3028319; Tue, 3 Oct 2023 11:40:17 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=VW33BTi4LRhyCB8V+VSge5UdY6EL2oYWYdYpyAl2F3w=; b=ZvK/mnSGHt78EuwBGOJZx2ltGWF8XJA6UXcnEndHwrGk7g/m1P36lZn31txyLPkG3Fq/ 2xyPl7fWqyM1K/g1Pq/A3drWC+BtGKCaEsVfIfuhJV6txkgs0lrInxla2BSIJr+9vkj6 9DHzSB1cQXcRcPc7AL9gcdrRy2Oc/oZvo5b1NleGn5iJBQ3bpswGj/V34JSSO6Y5NmC7 +moIgw3sJaIJGMuwc6zpP5qMTYKlmi2s+LT19GQDcDq83e3/gmNwNPr0W/IpBBpEPQ5+ ZRCiSk5PtfHcK8/uB0CUNXsCsFE2yg7DqhxUpC6DbPp+WdfG2/MI2NL+sDf2n1czjwIL sA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3tek6n1u50-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 03 Oct 2023 11:40:17 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 3 Oct 2023 11:40:15 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 3 Oct 2023 11:40:15 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id 1BF8A3F7043; Tue, 3 Oct 2023 11:40:06 -0700 (PDT) From: To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Long Li , Tyler Retzlaff , David Marchand , Konstantin Ananyev , Thomas Monjalon , =?utf-8?q?Morten_Br=C3=B8rup?= , Andrew Rybchenko , Liron Himi , Jerin Jacob CC: Subject: [dpdk-dev] [PATCH] common/cnxk: fix direct rte symbol usage Date: Wed, 4 Oct 2023 00:09:56 +0530 Message-ID: <20231003183956.1270510-1-jerinj@marvell.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: w28sWdB-pG1pAcVLgIQDDNRd2qJWiUAL X-Proofpoint-GUID: w28sWdB-pG1pAcVLgIQDDNRd2qJWiUAL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-03_15,2023-10-02_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Jerin Jacob The common code is shared between different driver environments, introduce missing plt_ abstractions of missing rte_ symbols and use plt symbols to avoid changing roc_* files. Also update the thread name for outbound soft expiry thread in a7ba40b2b1bf7. Fixes: 3d4e27fd7ff0 ("use abstracted bit count functions") Fixes: a7ba40b2b1bf ("drivers: convert to internal control threads") Fixes: c88d3638c7fc ("common/cnxk: support REE") Cc: stable@dpdk.org Signed-off-by: Jerin Jacob Acked-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_dev.c | 2 +- drivers/common/cnxk/roc_dev_priv.h | 2 +- drivers/common/cnxk/roc_nix_inl_dev.c | 4 ++-- drivers/common/cnxk/roc_nix_inl_priv.h | 2 +- drivers/common/cnxk/roc_nix_tm.c | 2 +- drivers/common/cnxk/roc_nix_tm_utils.c | 2 +- drivers/common/cnxk/roc_npa.c | 2 +- drivers/common/cnxk/roc_npc.c | 2 +- drivers/common/cnxk/roc_npc.h | 2 +- drivers/common/cnxk/roc_npc_mcam.c | 8 ++++---- drivers/common/cnxk/roc_platform.h | 8 +++++++- drivers/common/cnxk/roc_ree.c | 4 ++-- drivers/common/cnxk/roc_ree.h | 2 +- 13 files changed, 24 insertions(+), 18 deletions(-) diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index e41235ea8a..865e2f97c7 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -1166,7 +1166,7 @@ dev_active_vfs(struct dev *dev) int i, count = 0; for (i = 0; i < MAX_VFPF_DWORD_BITS; i++) - count += rte_popcount32(dev->active_vfs[i]); + count += plt_popcount32(dev->active_vfs[i]); return count; } diff --git a/drivers/common/cnxk/roc_dev_priv.h b/drivers/common/cnxk/roc_dev_priv.h index c1a37aa4f0..5b2c5096f8 100644 --- a/drivers/common/cnxk/roc_dev_priv.h +++ b/drivers/common/cnxk/roc_dev_priv.h @@ -73,7 +73,7 @@ dev_is_afvf(uint16_t pf_func) struct mbox_sync { bool start_thread; uint8_t msg_avail; - rte_thread_t pfvf_msg_thread; + plt_thread_t pfvf_msg_thread; pthread_cond_t pfvf_msg_cond; pthread_mutex_t mutex; }; diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index 6aa191410b..614d0858e5 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -826,7 +826,7 @@ nix_inl_outb_poll_thread_setup(struct nix_inl_dev *inl_dev) soft_exp_consumer_cnt = 0; soft_exp_poll_thread_exit = false; rc = plt_thread_create_control(&inl_dev->soft_exp_poll_thread, - "outb-poll", nix_inl_outb_poll_thread, inl_dev); + "outb-soft-exp-poll", nix_inl_outb_poll_thread, inl_dev); if (rc) { plt_bitmap_free(inl_dev->soft_exp_ring_bmap); plt_free(inl_dev->soft_exp_ring_bmap_mem); @@ -1028,7 +1028,7 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev) if (inl_dev->set_soft_exp_poll) { soft_exp_poll_thread_exit = true; - rte_thread_join(inl_dev->soft_exp_poll_thread, NULL); + plt_thread_join(inl_dev->soft_exp_poll_thread, NULL); plt_bitmap_free(inl_dev->soft_exp_ring_bmap); plt_free(inl_dev->soft_exp_ring_bmap_mem); plt_free(inl_dev->sa_soft_exp_ring); diff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h index b2b89227b1..3217f4ebc1 100644 --- a/drivers/common/cnxk/roc_nix_inl_priv.h +++ b/drivers/common/cnxk/roc_nix_inl_priv.h @@ -67,7 +67,7 @@ struct nix_inl_dev { struct roc_cpt_lf cpt_lf; /* OUTB soft expiry poll thread */ - rte_thread_t soft_exp_poll_thread; + plt_thread_t soft_exp_poll_thread; uint32_t soft_exp_poll_freq; uint64_t *sa_soft_exp_ring; bool set_soft_exp_poll; diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c index a24bce9e70..ece88b5e99 100644 --- a/drivers/common/cnxk/roc_nix_tm.c +++ b/drivers/common/cnxk/roc_nix_tm.c @@ -11,7 +11,7 @@ bitmap_ctzll(uint64_t slab) if (slab == 0) return 0; - return rte_ctz64(slab); + return plt_ctz64(slab); } void diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index c14517c9ea..8e3da95a45 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -927,7 +927,7 @@ nix_tm_resource_avail(struct nix *nix, uint8_t hw_lvl, bool contig) /* Count bit set */ start_pos = pos; do { - count += rte_popcount64(slab); + count += plt_popcount64(slab); if (!plt_bitmap_scan(bmp, &pos, &slab)) break; } while (pos != start_pos); diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c index 1943bc5420..b76b8e2342 100644 --- a/drivers/common/cnxk/roc_npa.c +++ b/drivers/common/cnxk/roc_npa.c @@ -400,7 +400,7 @@ bitmap_ctzll(uint64_t slab) if (slab == 0) return 0; - return rte_ctz64(slab); + return plt_ctz64(slab); } static int diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index 94c8e94400..f36f5e42c8 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -1435,7 +1435,7 @@ roc_npc_sdp_channel_get(struct roc_npc *roc_npc, uint16_t *chan_base, uint16_t * num_chan = nix->rx_chan_cnt - 1; if (num_chan) { range = *chan_base ^ (*chan_base + num_chan); - num_bits = (sizeof(uint32_t) * 8) - rte_clz32(range) - 1; + num_bits = (sizeof(uint32_t) * 8) - plt_clz32(range) - 1; /* Set mask for (15 - numbits) MSB bits */ *chan_mask = (uint16_t)~GENMASK(num_bits, 0); } else { diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h index 5a7117eae4..cf7e6c9548 100644 --- a/drivers/common/cnxk/roc_npc.h +++ b/drivers/common/cnxk/roc_npc.h @@ -359,7 +359,7 @@ struct roc_npc_flow_age { uint32_t aged_flows_cnt; uint32_t start_id; uint32_t end_id; - rte_thread_t aged_flows_poll_thread; + plt_thread_t aged_flows_poll_thread; struct plt_bitmap *aged_flows; void *age_mem; bool aged_flows_get_thread_exit; diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c index 8ec4bef472..41edec7d8d 100644 --- a/drivers/common/cnxk/roc_npc_mcam.c +++ b/drivers/common/cnxk/roc_npc_mcam.c @@ -745,7 +745,7 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow, struct npc_ * For all other rules, set LA LTYPE to match both 1st pass and 2nd pass ltypes. */ if (pst->is_second_pass_rule || (!pst->is_second_pass_rule && pst->has_eth_type)) { - la_offset = rte_popcount32(npc->keyx_supp_nmask[flow->nix_intf] & + la_offset = plt_popcount32(npc->keyx_supp_nmask[flow->nix_intf] & ((1ULL << 9 /* LA offset */) - 1)); la_offset *= 4; @@ -790,7 +790,7 @@ npc_set_vlan_ltype(struct npc_parse_state *pst) uint8_t lb_offset; lb_offset = - rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & + plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & ((1ULL << NPC_LTYPE_LB_OFFSET) - 1)); lb_offset *= 4; @@ -812,7 +812,7 @@ npc_set_ipv6ext_ltype_mask(struct npc_parse_state *pst) uint64_t val, mask; lc_offset = - rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & + plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & ((1ULL << NPC_LTYPE_LC_OFFSET) - 1)); lc_offset *= 4; @@ -835,7 +835,7 @@ npc_set_ipv6ext_ltype_mask(struct npc_parse_state *pst) * zero in LFLAG. */ if (pst->npc->keyx_supp_nmask[pst->nix_intf] & (1ULL << NPC_LFLAG_LC_OFFSET)) { - lcflag_offset = rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & + lcflag_offset = plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] & ((1ULL << NPC_LFLAG_LC_OFFSET) - 1)); lcflag_offset *= 4; diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 1e535a527d..ba23b2e0d7 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -137,6 +137,7 @@ #define plt_seqcount_write_begin rte_seqcount_write_begin #define plt_seqcount_write_end rte_seqcount_write_end +#define plt_thread_t rte_thread_t #define plt_intr_callback_register rte_intr_callback_register #define plt_intr_callback_unregister rte_intr_callback_unregister #define plt_intr_disable rte_intr_disable @@ -146,7 +147,7 @@ #define plt_thread_join rte_thread_join static inline bool -plt_thread_is_valid(rte_thread_t thr) +plt_thread_is_valid(plt_thread_t thr) { return thr.opaque_id ? true : false; } @@ -209,6 +210,11 @@ plt_thread_is_valid(rte_thread_t thr) #define plt_bit_relaxed_set64 rte_bit_relaxed_set64 #define plt_bit_relaxed_clear64 rte_bit_relaxed_clear64 +#define plt_popcount32 rte_popcount32 +#define plt_popcount64 rte_popcount64 +#define plt_clz32 rte_clz32 +#define plt_ctz64 rte_ctz64 + #define plt_mmap mmap #define PLT_PROT_READ PROT_READ #define PLT_PROT_WRITE PROT_WRITE diff --git a/drivers/common/cnxk/roc_ree.c b/drivers/common/cnxk/roc_ree.c index 1eb2ae7272..b6392658c3 100644 --- a/drivers/common/cnxk/roc_ree.c +++ b/drivers/common/cnxk/roc_ree.c @@ -441,7 +441,7 @@ static void roc_ree_lf_err_intr_unregister(struct roc_ree_vf *vf, uint16_t msix_off, uintptr_t base) { - struct rte_pci_device *pci_dev = vf->pci_dev; + struct plt_pci_device *pci_dev = vf->pci_dev; /* Disable error interrupts */ plt_write64(~0ull, base + REE_LF_MISC_INT_ENA_W1C); @@ -468,7 +468,7 @@ static int roc_ree_lf_err_intr_register(struct roc_ree_vf *vf, uint16_t msix_off, uintptr_t base) { - struct rte_pci_device *pci_dev = vf->pci_dev; + struct plt_pci_device *pci_dev = vf->pci_dev; int ret; /* Disable error interrupts */ diff --git a/drivers/common/cnxk/roc_ree.h b/drivers/common/cnxk/roc_ree.h index e138e4de66..bf994e7124 100644 --- a/drivers/common/cnxk/roc_ree.h +++ b/drivers/common/cnxk/roc_ree.h @@ -68,7 +68,7 @@ struct roc_ree_qp { /**< Base address where BAR is mapped */ struct roc_ree_pending_queue pend_q; /**< Pending queue */ - rte_iova_t iq_dma_addr; + plt_iova_t iq_dma_addr; /**< Instruction queue address */ uint32_t roc_regexdev_jobid; /**< Job ID */