[v2,1/2] common/cnxk: fix direct rte symbol usage
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Commit Message
From: Jerin Jacob <jerinj@marvell.com>
The common code is shared between different driver environments,
introduce missing plt_ abstractions of missing rte_ symbols and
use plt symbols to avoid changing roc_* files.
Fixes: 3d4e27fd7ff0 ("use abstracted bit count functions")
Fixes: a7ba40b2b1bf ("drivers: convert to internal control threads")
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
---
v2:
- Remove thread name change (David)
- Split REE changes as seperate patch to enable backporting (David)
drivers/common/cnxk/roc_dev.c | 2 +-
drivers/common/cnxk/roc_dev_priv.h | 2 +-
drivers/common/cnxk/roc_nix_inl_dev.c | 2 +-
drivers/common/cnxk/roc_nix_inl_priv.h | 2 +-
drivers/common/cnxk/roc_nix_tm.c | 2 +-
drivers/common/cnxk/roc_nix_tm_utils.c | 2 +-
drivers/common/cnxk/roc_npa.c | 2 +-
drivers/common/cnxk/roc_npc.c | 2 +-
drivers/common/cnxk/roc_npc.h | 2 +-
drivers/common/cnxk/roc_npc_mcam.c | 8 ++++----
drivers/common/cnxk/roc_platform.h | 8 +++++++-
11 files changed, 20 insertions(+), 14 deletions(-)
@@ -1166,7 +1166,7 @@ dev_active_vfs(struct dev *dev)
int i, count = 0;
for (i = 0; i < MAX_VFPF_DWORD_BITS; i++)
- count += rte_popcount32(dev->active_vfs[i]);
+ count += plt_popcount32(dev->active_vfs[i]);
return count;
}
@@ -73,7 +73,7 @@ dev_is_afvf(uint16_t pf_func)
struct mbox_sync {
bool start_thread;
uint8_t msg_avail;
- rte_thread_t pfvf_msg_thread;
+ plt_thread_t pfvf_msg_thread;
pthread_cond_t pfvf_msg_cond;
pthread_mutex_t mutex;
};
@@ -1028,7 +1028,7 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev)
if (inl_dev->set_soft_exp_poll) {
soft_exp_poll_thread_exit = true;
- rte_thread_join(inl_dev->soft_exp_poll_thread, NULL);
+ plt_thread_join(inl_dev->soft_exp_poll_thread, NULL);
plt_bitmap_free(inl_dev->soft_exp_ring_bmap);
plt_free(inl_dev->soft_exp_ring_bmap_mem);
plt_free(inl_dev->sa_soft_exp_ring);
@@ -67,7 +67,7 @@ struct nix_inl_dev {
struct roc_cpt_lf cpt_lf;
/* OUTB soft expiry poll thread */
- rte_thread_t soft_exp_poll_thread;
+ plt_thread_t soft_exp_poll_thread;
uint32_t soft_exp_poll_freq;
uint64_t *sa_soft_exp_ring;
bool set_soft_exp_poll;
@@ -11,7 +11,7 @@ bitmap_ctzll(uint64_t slab)
if (slab == 0)
return 0;
- return rte_ctz64(slab);
+ return plt_ctz64(slab);
}
void
@@ -927,7 +927,7 @@ nix_tm_resource_avail(struct nix *nix, uint8_t hw_lvl, bool contig)
/* Count bit set */
start_pos = pos;
do {
- count += rte_popcount64(slab);
+ count += plt_popcount64(slab);
if (!plt_bitmap_scan(bmp, &pos, &slab))
break;
} while (pos != start_pos);
@@ -400,7 +400,7 @@ bitmap_ctzll(uint64_t slab)
if (slab == 0)
return 0;
- return rte_ctz64(slab);
+ return plt_ctz64(slab);
}
static int
@@ -1435,7 +1435,7 @@ roc_npc_sdp_channel_get(struct roc_npc *roc_npc, uint16_t *chan_base, uint16_t *
num_chan = nix->rx_chan_cnt - 1;
if (num_chan) {
range = *chan_base ^ (*chan_base + num_chan);
- num_bits = (sizeof(uint32_t) * 8) - rte_clz32(range) - 1;
+ num_bits = (sizeof(uint32_t) * 8) - plt_clz32(range) - 1;
/* Set mask for (15 - numbits) MSB bits */
*chan_mask = (uint16_t)~GENMASK(num_bits, 0);
} else {
@@ -359,7 +359,7 @@ struct roc_npc_flow_age {
uint32_t aged_flows_cnt;
uint32_t start_id;
uint32_t end_id;
- rte_thread_t aged_flows_poll_thread;
+ plt_thread_t aged_flows_poll_thread;
struct plt_bitmap *aged_flows;
void *age_mem;
bool aged_flows_get_thread_exit;
@@ -745,7 +745,7 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow, struct npc_
* For all other rules, set LA LTYPE to match both 1st pass and 2nd pass ltypes.
*/
if (pst->is_second_pass_rule || (!pst->is_second_pass_rule && pst->has_eth_type)) {
- la_offset = rte_popcount32(npc->keyx_supp_nmask[flow->nix_intf] &
+ la_offset = plt_popcount32(npc->keyx_supp_nmask[flow->nix_intf] &
((1ULL << 9 /* LA offset */) - 1));
la_offset *= 4;
@@ -790,7 +790,7 @@ npc_set_vlan_ltype(struct npc_parse_state *pst)
uint8_t lb_offset;
lb_offset =
- rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
+ plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
((1ULL << NPC_LTYPE_LB_OFFSET) - 1));
lb_offset *= 4;
@@ -812,7 +812,7 @@ npc_set_ipv6ext_ltype_mask(struct npc_parse_state *pst)
uint64_t val, mask;
lc_offset =
- rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
+ plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
((1ULL << NPC_LTYPE_LC_OFFSET) - 1));
lc_offset *= 4;
@@ -835,7 +835,7 @@ npc_set_ipv6ext_ltype_mask(struct npc_parse_state *pst)
* zero in LFLAG.
*/
if (pst->npc->keyx_supp_nmask[pst->nix_intf] & (1ULL << NPC_LFLAG_LC_OFFSET)) {
- lcflag_offset = rte_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
+ lcflag_offset = plt_popcount32(pst->npc->keyx_supp_nmask[pst->nix_intf] &
((1ULL << NPC_LFLAG_LC_OFFSET) - 1));
lcflag_offset *= 4;
@@ -137,6 +137,7 @@
#define plt_seqcount_write_begin rte_seqcount_write_begin
#define plt_seqcount_write_end rte_seqcount_write_end
+#define plt_thread_t rte_thread_t
#define plt_intr_callback_register rte_intr_callback_register
#define plt_intr_callback_unregister rte_intr_callback_unregister
#define plt_intr_disable rte_intr_disable
@@ -146,7 +147,7 @@
#define plt_thread_join rte_thread_join
static inline bool
-plt_thread_is_valid(rte_thread_t thr)
+plt_thread_is_valid(plt_thread_t thr)
{
return thr.opaque_id ? true : false;
}
@@ -209,6 +210,11 @@ plt_thread_is_valid(rte_thread_t thr)
#define plt_bit_relaxed_set64 rte_bit_relaxed_set64
#define plt_bit_relaxed_clear64 rte_bit_relaxed_clear64
+#define plt_popcount32 rte_popcount32
+#define plt_popcount64 rte_popcount64
+#define plt_clz32 rte_clz32
+#define plt_ctz64 rte_ctz64
+
#define plt_mmap mmap
#define PLT_PROT_READ PROT_READ
#define PLT_PROT_WRITE PROT_WRITE