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Signed-off-by: Chaoyong He Reviewed-by: Long Wu Reviewed-by: Peng Zhang --- drivers/common/nfp/meson.build | 3 +- drivers/common/nfp/nfp_common.c | 133 ++++++++++++++++++ drivers/common/nfp/nfp_common.h | 227 +++++++++++++++++++++++++++++++ drivers/common/nfp/version.map | 5 + drivers/net/nfp/nfp_ethdev.c | 4 +- drivers/net/nfp/nfp_ethdev_vf.c | 16 +-- drivers/net/nfp/nfp_net_common.c | 109 +-------------- drivers/net/nfp/nfp_net_common.h | 203 +-------------------------- 8 files changed, 373 insertions(+), 327 deletions(-) create mode 100644 drivers/common/nfp/nfp_common.c create mode 100644 drivers/common/nfp/nfp_common.h diff --git a/drivers/common/nfp/meson.build b/drivers/common/nfp/meson.build index 45871dfe35..727d21e00b 100644 --- a/drivers/common/nfp/meson.build +++ b/drivers/common/nfp/meson.build @@ -6,9 +6,10 @@ if not is_linux or not dpdk_conf.get('RTE_ARCH_64') reason = 'only supported on 64-bit Linux' endif -deps += ['bus_pci'] +deps += ['bus_pci', 'net'] sources = files( + 'nfp_common.c', 'nfp_common_log.c', 'nfp_common_pci.c', ) diff --git a/drivers/common/nfp/nfp_common.c b/drivers/common/nfp/nfp_common.c new file mode 100644 index 0000000000..00dad4736e --- /dev/null +++ b/drivers/common/nfp/nfp_common.c @@ -0,0 +1,133 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2023 Corigine, Inc. + * All rights reserved. + */ + +#include "nfp_common.h" + +#include "nfp_common_log.h" + +/* + * This is used by the reconfig protocol. It sets the maximum time waiting in + * milliseconds before a reconfig timeout happens. + */ +#define NFP_NET_POLL_TIMEOUT 5000 + +int +nfp_reconfig_real(struct nfp_hw *hw, + uint32_t update) +{ + uint32_t cnt; + uint32_t new; + struct timespec wait; + + PMD_DRV_LOG(DEBUG, "Writing to the configuration queue (%p)...", + hw->qcp_cfg); + + if (hw->qcp_cfg == NULL) { + PMD_DRV_LOG(ERR, "Bad configuration queue pointer"); + return -ENXIO; + } + + nfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1); + + wait.tv_sec = 0; + wait.tv_nsec = 1000000; /* 1ms */ + + PMD_DRV_LOG(DEBUG, "Polling for update ack..."); + + /* Poll update field, waiting for NFP to ack the config */ + for (cnt = 0; ; cnt++) { + new = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE); + if (new == 0) + break; + + if ((new & NFP_NET_CFG_UPDATE_ERR) != 0) { + PMD_DRV_LOG(ERR, "Reconfig error: %#08x", new); + return -1; + } + + if (cnt >= NFP_NET_POLL_TIMEOUT) { + PMD_DRV_LOG(ERR, "Reconfig timeout for %#08x after %u ms", + update, cnt); + return -EIO; + } + + nanosleep(&wait, 0); /* waiting for a 1ms */ + } + + PMD_DRV_LOG(DEBUG, "Ack DONE"); + return 0; +} + +/** + * Reconfigure the NIC. + * + * Write the update word to the BAR and ping the reconfig queue. Then poll + * until the firmware has acknowledged the update by zeroing the update word. + * + * @param hw + * Device to reconfigure. + * @param ctrl + * The value for the ctrl field in the BAR config. + * @param update + * The value for the update field in the BAR config. + * + * @return + * - (0) if OK to reconfigure the device. + * - (-EIO) if I/O err and fail to reconfigure the device. + */ +int +nfp_reconfig(struct nfp_hw *hw, + uint32_t ctrl, + uint32_t update) +{ + int ret; + + rte_spinlock_lock(&hw->reconfig_lock); + + nn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl); + nn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update); + + rte_wmb(); + + ret = nfp_reconfig_real(hw, update); + + rte_spinlock_unlock(&hw->reconfig_lock); + + if (ret != 0) { + PMD_DRV_LOG(ERR, "Error nfp net reconfig: ctrl=%#08x update=%#08x", + ctrl, update); + return -EIO; + } + + return 0; +} + +void +nfp_read_mac(struct nfp_hw *hw) +{ + uint32_t tmp; + + tmp = rte_be_to_cpu_32(nn_cfg_readl(hw, NFP_NET_CFG_MACADDR)); + memcpy(&hw->mac_addr.addr_bytes[0], &tmp, 4); + + tmp = rte_be_to_cpu_32(nn_cfg_readl(hw, NFP_NET_CFG_MACADDR + 4)); + memcpy(&hw->mac_addr.addr_bytes[4], &tmp, 2); +} + +void +nfp_write_mac(struct nfp_hw *hw, + uint8_t *mac) +{ + uint32_t mac0; + uint16_t mac1; + + mac0 = *(uint32_t *)mac; + nn_writel(rte_cpu_to_be_32(mac0), hw->ctrl_bar + NFP_NET_CFG_MACADDR); + + mac += 4; + mac1 = *(uint16_t *)mac; + nn_writew(rte_cpu_to_be_16(mac1), + hw->ctrl_bar + NFP_NET_CFG_MACADDR + 6); +} diff --git a/drivers/common/nfp/nfp_common.h b/drivers/common/nfp/nfp_common.h new file mode 100644 index 0000000000..c3645b6ec5 --- /dev/null +++ b/drivers/common/nfp/nfp_common.h @@ -0,0 +1,227 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (c) 2023 Corigine, Inc. + * All rights reserved. + */ + +#ifndef __NFP_COMMON_H__ +#define __NFP_COMMON_H__ + +#include +#include +#include +#include + +#include "nfp_common_ctrl.h" + +#define NFP_QCP_QUEUE_ADDR_SZ (0x800) + +/* Macros for accessing the Queue Controller Peripheral 'CSRs' */ +#define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800) +#define NFP_QCP_QUEUE_ADD_RPTR 0x0000 +#define NFP_QCP_QUEUE_ADD_WPTR 0x0004 +#define NFP_QCP_QUEUE_STS_LO 0x0008 +#define NFP_QCP_QUEUE_STS_LO_READPTR_MASK (0x3ffff) +#define NFP_QCP_QUEUE_STS_HI 0x000c +#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_MASK (0x3ffff) + +/* Read or Write Pointer of a queue */ +enum nfp_qcp_ptr { + NFP_QCP_READ_PTR = 0, + NFP_QCP_WRITE_PTR +}; + +struct nfp_hw { + uint8_t *ctrl_bar; + uint8_t *qcp_cfg; + uint32_t cap; + uint32_t ctrl; /**< Current values for control */ + rte_spinlock_t reconfig_lock; + struct rte_ether_addr mac_addr; +}; + +static inline uint8_t +nn_readb(volatile const void *addr) +{ + return rte_read8(addr); +} + +static inline void +nn_writeb(uint8_t val, + volatile void *addr) +{ + rte_write8(val, addr); +} + +static inline uint32_t +nn_readl(volatile const void *addr) +{ + return rte_read32(addr); +} + +static inline void +nn_writel(uint32_t val, + volatile void *addr) +{ + rte_write32(val, addr); +} + +static inline uint16_t +nn_readw(volatile const void *addr) +{ + return rte_read16(addr); +} + +static inline void +nn_writew(uint16_t val, + volatile void *addr) +{ + rte_write16(val, addr); +} + +static inline uint64_t +nn_readq(volatile void *addr) +{ + uint32_t low; + uint32_t high; + const volatile uint32_t *p = addr; + + high = nn_readl((volatile const void *)(p + 1)); + low = nn_readl((volatile const void *)p); + + return low + ((uint64_t)high << 32); +} + +static inline void +nn_writeq(uint64_t val, + volatile void *addr) +{ + nn_writel(val >> 32, (volatile char *)addr + 4); + nn_writel(val, addr); +} + +static inline uint8_t +nn_cfg_readb(struct nfp_hw *hw, + uint32_t off) +{ + return nn_readb(hw->ctrl_bar + off); +} + +static inline void +nn_cfg_writeb(struct nfp_hw *hw, + uint32_t off, + uint8_t val) +{ + nn_writeb(val, hw->ctrl_bar + off); +} + +static inline uint16_t +nn_cfg_readw(struct nfp_hw *hw, + uint32_t off) +{ + return rte_le_to_cpu_16(nn_readw(hw->ctrl_bar + off)); +} + +static inline void +nn_cfg_writew(struct nfp_hw *hw, + uint32_t off, + uint16_t val) +{ + nn_writew(rte_cpu_to_le_16(val), hw->ctrl_bar + off); +} + +static inline uint32_t +nn_cfg_readl(struct nfp_hw *hw, + uint32_t off) +{ + return rte_le_to_cpu_32(nn_readl(hw->ctrl_bar + off)); +} + +static inline void +nn_cfg_writel(struct nfp_hw *hw, + uint32_t off, + uint32_t val) +{ + nn_writel(rte_cpu_to_le_32(val), hw->ctrl_bar + off); +} + +static inline uint64_t +nn_cfg_readq(struct nfp_hw *hw, + uint32_t off) +{ + return rte_le_to_cpu_64(nn_readq(hw->ctrl_bar + off)); +} + +static inline void +nn_cfg_writeq(struct nfp_hw *hw, + uint32_t off, + uint64_t val) +{ + nn_writeq(rte_cpu_to_le_64(val), hw->ctrl_bar + off); +} + +/** + * Add the value to the selected pointer of a queue. + * + * @param queue + * Base address for queue structure + * @param ptr + * Add to the read or write pointer + * @param val + * Value to add to the queue pointer + */ +static inline void +nfp_qcp_ptr_add(uint8_t *queue, + enum nfp_qcp_ptr ptr, + uint32_t val) +{ + uint32_t off; + + if (ptr == NFP_QCP_READ_PTR) + off = NFP_QCP_QUEUE_ADD_RPTR; + else + off = NFP_QCP_QUEUE_ADD_WPTR; + + nn_writel(rte_cpu_to_le_32(val), queue + off); +} + +/** + * Read the current read/write pointer value for a queue. + * + * @param queue + * Base address for queue structure + * @param ptr + * Read or Write pointer + */ +static inline uint32_t +nfp_qcp_read(uint8_t *queue, + enum nfp_qcp_ptr ptr) +{ + uint32_t off; + uint32_t val; + + if (ptr == NFP_QCP_READ_PTR) + off = NFP_QCP_QUEUE_STS_LO; + else + off = NFP_QCP_QUEUE_STS_HI; + + val = rte_cpu_to_le_32(nn_readl(queue + off)); + + if (ptr == NFP_QCP_READ_PTR) + return val & NFP_QCP_QUEUE_STS_LO_READPTR_MASK; + else + return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_MASK; +} + +__rte_internal +int nfp_reconfig_real(struct nfp_hw *hw, uint32_t update); + +__rte_internal +int nfp_reconfig(struct nfp_hw *hw, uint32_t ctrl, uint32_t update); + +__rte_internal +void nfp_read_mac(struct nfp_hw *hw); + +__rte_internal +void nfp_write_mac(struct nfp_hw *hw, uint8_t *mac); + +#endif/* __NFP_COMMON_H__ */ diff --git a/drivers/common/nfp/version.map b/drivers/common/nfp/version.map index 25e48c39d6..56db63f29c 100644 --- a/drivers/common/nfp/version.map +++ b/drivers/common/nfp/version.map @@ -3,5 +3,10 @@ INTERNAL { nfp_class_driver_register; + nfp_reconfig; + nfp_reconfig_real; + nfp_read_mac; + nfp_write_mac; + local: *; }; diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c index c6147ef01e..7b4439585b 100644 --- a/drivers/net/nfp/nfp_ethdev.c +++ b/drivers/net/nfp/nfp_ethdev.c @@ -599,13 +599,13 @@ nfp_net_init(struct rte_eth_dev *eth_dev) } nfp_net_pf_read_mac(app_fw_nic, port); - nfp_net_write_mac(hw, &hw->mac_addr.addr_bytes[0]); + nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); if (rte_is_valid_assigned_ether_addr(&hw->mac_addr) == 0) { PMD_INIT_LOG(INFO, "Using random mac address for port %d", port); /* Using random mac addresses for VFs */ rte_eth_random_addr(&hw->mac_addr.addr_bytes[0]); - nfp_net_write_mac(hw, &hw->mac_addr.addr_bytes[0]); + nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); } /* Copying mac address to DPDK eth_dev struct */ diff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c index 049728d30c..b9cfb48021 100644 --- a/drivers/net/nfp/nfp_ethdev_vf.c +++ b/drivers/net/nfp/nfp_ethdev_vf.c @@ -15,18 +15,6 @@ #include "nfp_logs.h" #include "nfp_net_common.h" -static void -nfp_netvf_read_mac(struct nfp_hw *hw) -{ - uint32_t tmp; - - tmp = rte_be_to_cpu_32(nn_cfg_readl(hw, NFP_NET_CFG_MACADDR)); - memcpy(&hw->mac_addr.addr_bytes[0], &tmp, 4); - - tmp = rte_be_to_cpu_32(nn_cfg_readl(hw, NFP_NET_CFG_MACADDR + 4)); - memcpy(&hw->mac_addr.addr_bytes[4], &tmp, 2); -} - static int nfp_netvf_start(struct rte_eth_dev *dev) { @@ -334,12 +322,12 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev) goto dev_err_ctrl_map; } - nfp_netvf_read_mac(hw); + nfp_read_mac(hw); if (rte_is_valid_assigned_ether_addr(&hw->mac_addr) == 0) { PMD_INIT_LOG(INFO, "Using random mac address for port %hu", port); /* Using random mac addresses for VFs */ rte_eth_random_addr(&hw->mac_addr.addr_bytes[0]); - nfp_net_write_mac(hw, &hw->mac_addr.addr_bytes[0]); + nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); } /* Copying mac address to DPDK eth_dev struct */ diff --git a/drivers/net/nfp/nfp_net_common.c b/drivers/net/nfp/nfp_net_common.c index 22222a9773..6d525648eb 100644 --- a/drivers/net/nfp/nfp_net_common.c +++ b/drivers/net/nfp/nfp_net_common.c @@ -198,97 +198,6 @@ nfp_net_notify_port_speed(struct nfp_net_hw *hw, /* The length of firmware version string */ #define FW_VER_LEN 32 -static int -nfp_reconfig_real(struct nfp_hw *hw, - uint32_t update) -{ - uint32_t cnt; - uint32_t new; - struct timespec wait; - - PMD_DRV_LOG(DEBUG, "Writing to the configuration queue (%p)...", - hw->qcp_cfg); - - if (hw->qcp_cfg == NULL) { - PMD_DRV_LOG(ERR, "Bad configuration queue pointer"); - return -ENXIO; - } - - nfp_qcp_ptr_add(hw->qcp_cfg, NFP_QCP_WRITE_PTR, 1); - - wait.tv_sec = 0; - wait.tv_nsec = 1000000; /* 1ms */ - - PMD_DRV_LOG(DEBUG, "Polling for update ack..."); - - /* Poll update field, waiting for NFP to ack the config */ - for (cnt = 0; ; cnt++) { - new = nn_cfg_readl(hw, NFP_NET_CFG_UPDATE); - if (new == 0) - break; - - if ((new & NFP_NET_CFG_UPDATE_ERR) != 0) { - PMD_DRV_LOG(ERR, "Reconfig error: %#08x", new); - return -1; - } - - if (cnt >= NFP_NET_POLL_TIMEOUT) { - PMD_DRV_LOG(ERR, "Reconfig timeout for %#08x after %u ms", - update, cnt); - return -EIO; - } - - nanosleep(&wait, 0); /* Waiting for a 1ms */ - } - - PMD_DRV_LOG(DEBUG, "Ack DONE"); - return 0; -} - -/** - * Reconfigure the NIC. - * - * Write the update word to the BAR and ping the reconfig queue. Then poll - * until the firmware has acknowledged the update by zeroing the update word. - * - * @param hw - * Device to reconfigure. - * @param ctrl - * The value for the ctrl field in the BAR config. - * @param update - * The value for the update field in the BAR config. - * - * @return - * - (0) if OK to reconfigure the device. - * - (-EIO) if I/O err and fail to reconfigure the device. - */ -int -nfp_reconfig(struct nfp_hw *hw, - uint32_t ctrl, - uint32_t update) -{ - int ret; - - rte_spinlock_lock(&hw->reconfig_lock); - - nn_cfg_writel(hw, NFP_NET_CFG_CTRL, ctrl); - nn_cfg_writel(hw, NFP_NET_CFG_UPDATE, update); - - rte_wmb(); - - ret = nfp_reconfig_real(hw, update); - - rte_spinlock_unlock(&hw->reconfig_lock); - - if (ret != 0) { - PMD_DRV_LOG(ERR, "Error nfp net reconfig: ctrl=%#08x update=%#08x", - ctrl, update); - return -EIO; - } - - return 0; -} - /** * Reconfigure the NIC for the extend ctrl BAR. * @@ -531,22 +440,6 @@ nfp_net_cfg_queue_setup(struct nfp_net_hw *hw) hw->super.qcp_cfg = hw->tx_bar + NFP_QCP_QUEUE_ADDR_SZ; } -void -nfp_net_write_mac(struct nfp_hw *hw, - uint8_t *mac) -{ - uint32_t mac0; - uint16_t mac1; - - mac0 = *(uint32_t *)mac; - nn_writel(rte_cpu_to_be_32(mac0), hw->ctrl_bar + NFP_NET_CFG_MACADDR); - - mac += 4; - mac1 = *(uint16_t *)mac; - nn_writew(rte_cpu_to_be_16(mac1), - hw->ctrl_bar + NFP_NET_CFG_MACADDR + 6); -} - int nfp_net_set_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr) @@ -565,7 +458,7 @@ nfp_net_set_mac_addr(struct rte_eth_dev *dev, } /* Writing new MAC to the specific port BAR address */ - nfp_net_write_mac(hw, (uint8_t *)mac_addr); + nfp_write_mac(hw, (uint8_t *)mac_addr); update = NFP_NET_CFG_UPDATE_MACADDR; ctrl = hw->ctrl; diff --git a/drivers/net/nfp/nfp_net_common.h b/drivers/net/nfp/nfp_net_common.h index 02a5ffefd8..0ded35a874 100644 --- a/drivers/net/nfp/nfp_net_common.h +++ b/drivers/net/nfp/nfp_net_common.h @@ -8,21 +8,12 @@ #include #include -#include +#include #include #include "nfp_net_ctrl.h" #include "nfpcore/nfp_dev.h" -/* Macros for accessing the Queue Controller Peripheral 'CSRs' */ -#define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800) -#define NFP_QCP_QUEUE_ADD_RPTR 0x0000 -#define NFP_QCP_QUEUE_ADD_WPTR 0x0004 -#define NFP_QCP_QUEUE_STS_LO 0x0008 -#define NFP_QCP_QUEUE_STS_LO_READPTR_MASK (0x3ffff) -#define NFP_QCP_QUEUE_STS_HI 0x000c -#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_MASK (0x3ffff) - /* Interrupt definitions */ #define NFP_NET_IRQ_LSC_IDX 0 @@ -42,8 +33,6 @@ /* Alignment for dma zones */ #define NFP_MEMZONE_ALIGN 128 -#define NFP_QCP_QUEUE_ADDR_SZ (0x800) - /* Number of supported physical ports */ #define NFP_MAX_PHYPORTS 12 @@ -53,12 +42,6 @@ enum nfp_app_fw_id { NFP_APP_FW_FLOWER_NIC = 0x3, }; -/* Read or Write Pointer of a queue */ -enum nfp_qcp_ptr { - NFP_QCP_READ_PTR = 0, - NFP_QCP_WRITE_PTR -}; - enum nfp_net_meta_format { NFP_NET_METAFORMAT_SINGLE, NFP_NET_METAFORMAT_CHAINED, @@ -112,15 +95,6 @@ struct nfp_app_fw_nic { uint8_t total_phyports; }; -struct nfp_hw { - uint8_t *ctrl_bar; - uint8_t *qcp_cfg; - uint32_t cap; - uint32_t ctrl; /**< Current values for control */ - rte_spinlock_t reconfig_lock; - struct rte_ether_addr mac_addr; -}; - struct nfp_net_hw { /** The parent class */ struct nfp_hw super; @@ -183,179 +157,6 @@ struct nfp_net_adapter { struct nfp_net_hw hw; }; -static inline uint8_t -nn_readb(volatile const void *addr) -{ - return rte_read8(addr); -} - -static inline void -nn_writeb(uint8_t val, - volatile void *addr) -{ - rte_write8(val, addr); -} - -static inline uint32_t -nn_readl(volatile const void *addr) -{ - return rte_read32(addr); -} - -static inline void -nn_writel(uint32_t val, - volatile void *addr) -{ - rte_write32(val, addr); -} - -static inline uint16_t -nn_readw(volatile const void *addr) -{ - return rte_read16(addr); -} - -static inline void -nn_writew(uint16_t val, - volatile void *addr) -{ - rte_write16(val, addr); -} - -static inline uint64_t -nn_readq(volatile void *addr) -{ - uint32_t low; - uint32_t high; - const volatile uint32_t *p = addr; - - high = nn_readl((volatile const void *)(p + 1)); - low = nn_readl((volatile const void *)p); - - return low + ((uint64_t)high << 32); -} - -static inline void -nn_writeq(uint64_t val, - volatile void *addr) -{ - nn_writel(val >> 32, (volatile char *)addr + 4); - nn_writel(val, addr); -} - -static inline uint8_t -nn_cfg_readb(struct nfp_hw *hw, - uint32_t off) -{ - return nn_readb(hw->ctrl_bar + off); -} - -static inline void -nn_cfg_writeb(struct nfp_hw *hw, - uint32_t off, - uint8_t val) -{ - nn_writeb(val, hw->ctrl_bar + off); -} - -static inline uint16_t -nn_cfg_readw(struct nfp_hw *hw, - uint32_t off) -{ - return rte_le_to_cpu_16(nn_readw(hw->ctrl_bar + off)); -} - -static inline void -nn_cfg_writew(struct nfp_hw *hw, - uint32_t off, - uint16_t val) -{ - nn_writew(rte_cpu_to_le_16(val), hw->ctrl_bar + off); -} - -static inline uint32_t -nn_cfg_readl(struct nfp_hw *hw, - uint32_t off) -{ - return rte_le_to_cpu_32(nn_readl(hw->ctrl_bar + off)); -} - -static inline void -nn_cfg_writel(struct nfp_hw *hw, - uint32_t off, - uint32_t val) -{ - nn_writel(rte_cpu_to_le_32(val), hw->ctrl_bar + off); -} - -static inline uint64_t -nn_cfg_readq(struct nfp_hw *hw, - uint32_t off) -{ - return rte_le_to_cpu_64(nn_readq(hw->ctrl_bar + off)); -} - -static inline void -nn_cfg_writeq(struct nfp_hw *hw, - uint32_t off, - uint64_t val) -{ - nn_writeq(rte_cpu_to_le_64(val), hw->ctrl_bar + off); -} - -/** - * Add the value to the selected pointer of a queue. - * - * @param queue - * Base address for queue structure - * @param ptr - * Add to the read or write pointer - * @param val - * Value to add to the queue pointer - */ -static inline void -nfp_qcp_ptr_add(uint8_t *queue, - enum nfp_qcp_ptr ptr, - uint32_t val) -{ - uint32_t off; - - if (ptr == NFP_QCP_READ_PTR) - off = NFP_QCP_QUEUE_ADD_RPTR; - else - off = NFP_QCP_QUEUE_ADD_WPTR; - - nn_writel(rte_cpu_to_le_32(val), queue + off); -} - -/** - * Read the current read/write pointer value for a queue. - * - * @param queue - * Base address for queue structure - * @param ptr - * Read or Write pointer - */ -static inline uint32_t -nfp_qcp_read(uint8_t *queue, - enum nfp_qcp_ptr ptr) -{ - uint32_t off; - uint32_t val; - - if (ptr == NFP_QCP_READ_PTR) - off = NFP_QCP_QUEUE_STS_LO; - else - off = NFP_QCP_QUEUE_STS_HI; - - val = rte_cpu_to_le_32(nn_readl(queue + off)); - - if (ptr == NFP_QCP_READ_PTR) - return val & NFP_QCP_QUEUE_STS_LO_READPTR_MASK; - else - return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_MASK; -} - static inline uint32_t nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info, uint16_t queue) @@ -365,7 +166,6 @@ nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info, } /* Prototypes for common NFP functions */ -int nfp_reconfig(struct nfp_hw *hw, uint32_t ctrl, uint32_t update); int nfp_net_ext_reconfig(struct nfp_net_hw *hw, uint32_t ctrl_ext, uint32_t update); int nfp_net_mbox_reconfig(struct nfp_net_hw *hw, uint32_t mbox_cmd); int nfp_net_configure(struct rte_eth_dev *dev); @@ -374,7 +174,6 @@ void nfp_net_log_device_information(const struct nfp_net_hw *hw); void nfp_net_enable_queues(struct rte_eth_dev *dev); void nfp_net_disable_queues(struct rte_eth_dev *dev); void nfp_net_params_setup(struct nfp_net_hw *hw); -void nfp_net_write_mac(struct nfp_hw *hw, uint8_t *mac); int nfp_net_set_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); int nfp_configure_rx_interrupt(struct rte_eth_dev *dev, struct rte_intr_handle *intr_handle);