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([10.233.181.123]) by fmsmga008.fm.intel.com with ESMTP; 27 Oct 2023 16:04:10 -0700 From: Nicolas Chautru To: dev@dpdk.org, maxime.coquelin@redhat.com Cc: hemant.agrawal@nxp.com, david.marchand@redhat.com, hernan.vargas@intel.com, stable@dpdk.org, Nicolas Chautru Subject: [PATCH v2 03/10] test/bbdev: rename macros from acc200 to vrb Date: Fri, 27 Oct 2023 22:57:21 +0000 Message-Id: <20231027225728.563914-4-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231027225728.563914-1-nicolas.chautru@intel.com> References: <20231027225728.563914-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Renaming ACC200 macros to use generic intel vRAN Boost (VRB). No functional impact. Fixes: 69a9d9e139d2 ("baseband/acc: rename files from acc200 to vrb") Cc: stable@dpdk.org Signed-off-by: Hernan Vargas Signed-off-by: Nicolas Chautru --- app/test-bbdev/test_bbdev_perf.c | 91 ++++++++++++++++---------------- 1 file changed, 45 insertions(+), 46 deletions(-) diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index faea26c10e..d4c001de00 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -64,14 +64,14 @@ #define ACC100_QMGR_INVALID_IDX -1 #define ACC100_QMGR_RR 1 #define ACC100_QOS_GBR 0 -#define ACC200PF_DRIVER_NAME ("intel_acc200_pf") -#define ACC200VF_DRIVER_NAME ("intel_acc200_vf") -#define ACC200_QMGR_NUM_AQS 16 -#define ACC200_QMGR_NUM_QGS 2 -#define ACC200_QMGR_AQ_DEPTH 5 -#define ACC200_QMGR_INVALID_IDX -1 -#define ACC200_QMGR_RR 1 -#define ACC200_QOS_GBR 0 +#define VRBPF_DRIVER_NAME ("intel_vran_boost_pf") +#define VRBVF_DRIVER_NAME ("intel_vran_boost_vf") +#define VRB_QMGR_NUM_AQS 16 +#define VRB_QMGR_NUM_QGS 2 +#define VRB_QMGR_AQ_DEPTH 5 +#define VRB_QMGR_INVALID_IDX -1 +#define VRB_QMGR_RR 1 +#define VRB_QOS_GBR 0 #endif #define OPS_CACHE_SIZE 256U @@ -794,11 +794,11 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info, info->dev_name); } if ((get_init_device() == true) && - (!strcmp(info->drv.driver_name, ACC200PF_DRIVER_NAME))) { + (!strcmp(info->drv.driver_name, VRBPF_DRIVER_NAME))) { struct rte_acc_conf conf; unsigned int i; - printf("Configure ACC200 FEC Driver %s with default values\n", + printf("Configure Driver %s with default values\n", info->drv.driver_name); /* clear default configuration before initialization */ @@ -807,52 +807,51 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info, /* Always set in PF mode for built-in configuration */ conf.pf_mode_en = true; for (i = 0; i < RTE_ACC_NUM_VFS; ++i) { - conf.arb_dl_4g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_dl_4g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_dl_4g[i].round_robin_weight = ACC200_QMGR_RR; - conf.arb_ul_4g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_ul_4g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_ul_4g[i].round_robin_weight = ACC200_QMGR_RR; - conf.arb_dl_5g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_dl_5g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_dl_5g[i].round_robin_weight = ACC200_QMGR_RR; - conf.arb_ul_5g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_ul_5g[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_ul_5g[i].round_robin_weight = ACC200_QMGR_RR; - conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_fft[i].gbr_threshold1 = ACC200_QOS_GBR; - conf.arb_fft[i].round_robin_weight = ACC200_QMGR_RR; + conf.arb_dl_4g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_dl_4g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_dl_4g[i].round_robin_weight = VRB_QMGR_RR; + conf.arb_ul_4g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_ul_4g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_ul_4g[i].round_robin_weight = VRB_QMGR_RR; + conf.arb_dl_5g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_dl_5g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_dl_5g[i].round_robin_weight = VRB_QMGR_RR; + conf.arb_ul_5g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_ul_5g[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_ul_5g[i].round_robin_weight = VRB_QMGR_RR; + conf.arb_fft[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_fft[i].gbr_threshold1 = VRB_QOS_GBR; + conf.arb_fft[i].round_robin_weight = VRB_QMGR_RR; } conf.input_pos_llr_1_bit = true; conf.output_pos_llr_1_bit = true; conf.num_vf_bundles = 1; /**< Number of VF bundles to setup */ - conf.q_ul_4g.num_qgroups = ACC200_QMGR_NUM_QGS; - conf.q_ul_4g.first_qgroup_index = ACC200_QMGR_INVALID_IDX; - conf.q_ul_4g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS; - conf.q_ul_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH; - conf.q_dl_4g.num_qgroups = ACC200_QMGR_NUM_QGS; - conf.q_dl_4g.first_qgroup_index = ACC200_QMGR_INVALID_IDX; - conf.q_dl_4g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS; - conf.q_dl_4g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH; - conf.q_ul_5g.num_qgroups = ACC200_QMGR_NUM_QGS; - conf.q_ul_5g.first_qgroup_index = ACC200_QMGR_INVALID_IDX; - conf.q_ul_5g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS; - conf.q_ul_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH; - conf.q_dl_5g.num_qgroups = ACC200_QMGR_NUM_QGS; - conf.q_dl_5g.first_qgroup_index = ACC200_QMGR_INVALID_IDX; - conf.q_dl_5g.num_aqs_per_groups = ACC200_QMGR_NUM_AQS; - conf.q_dl_5g.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH; - conf.q_fft.num_qgroups = ACC200_QMGR_NUM_QGS; - conf.q_fft.first_qgroup_index = ACC200_QMGR_INVALID_IDX; - conf.q_fft.num_aqs_per_groups = ACC200_QMGR_NUM_AQS; - conf.q_fft.aq_depth_log2 = ACC200_QMGR_AQ_DEPTH; + conf.q_ul_4g.num_qgroups = VRB_QMGR_NUM_QGS; + conf.q_ul_4g.first_qgroup_index = VRB_QMGR_INVALID_IDX; + conf.q_ul_4g.num_aqs_per_groups = VRB_QMGR_NUM_AQS; + conf.q_ul_4g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH; + conf.q_dl_4g.num_qgroups = VRB_QMGR_NUM_QGS; + conf.q_dl_4g.first_qgroup_index = VRB_QMGR_INVALID_IDX; + conf.q_dl_4g.num_aqs_per_groups = VRB_QMGR_NUM_AQS; + conf.q_dl_4g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH; + conf.q_ul_5g.num_qgroups = VRB_QMGR_NUM_QGS; + conf.q_ul_5g.first_qgroup_index = VRB_QMGR_INVALID_IDX; + conf.q_ul_5g.num_aqs_per_groups = VRB_QMGR_NUM_AQS; + conf.q_ul_5g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH; + conf.q_dl_5g.num_qgroups = VRB_QMGR_NUM_QGS; + conf.q_dl_5g.first_qgroup_index = VRB_QMGR_INVALID_IDX; + conf.q_dl_5g.num_aqs_per_groups = VRB_QMGR_NUM_AQS; + conf.q_dl_5g.aq_depth_log2 = VRB_QMGR_AQ_DEPTH; + conf.q_fft.num_qgroups = VRB_QMGR_NUM_QGS; + conf.q_fft.first_qgroup_index = VRB_QMGR_INVALID_IDX; + conf.q_fft.num_aqs_per_groups = VRB_QMGR_NUM_AQS; /* setup PF with configuration information */ ret = rte_acc_configure(info->dev_name, &conf); TEST_ASSERT_SUCCESS(ret, - "Failed to configure ACC200 PF for bbdev %s", + "Failed to configure PF for bbdev %s", info->dev_name); } #endif