From patchwork Sun Oct 29 16:31:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory Etelson X-Patchwork-Id: 133584 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 08BF043238; Sun, 29 Oct 2023 17:33:59 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 48437406FF; Sun, 29 Oct 2023 17:33:10 +0100 (CET) Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1nam02on2044.outbound.protection.outlook.com [40.107.96.44]) by mails.dpdk.org (Postfix) with ESMTP id C7E8E40EDC for ; Sun, 29 Oct 2023 17:33:06 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IGGy/WI44w54n+ry5PHH0XHH1jO4ZtGasfrDW4TL4KuWsZS6BBVsdjJkjxUfevLygTEtDC7vNDToGAsDIXl+lh6WK63XINZ3c1Bdv9qp0DEgqAO4xrOMiL5cfcVafsUcEx5LpGJkdz1ws2lEAanpdXlMonW4VwtoS0LaU0q/o5aKQwZGpL+eTvT4c8MVVYnZz4XPROPanUp9mXQnOiZITd5eLdtjDgqgbGyiRCQZJEmf4JsDNkpHOjyUbdoD31/fLenvZyTZllZCu3aPGMEJApcsdP5a0UthunRxAcKRd8Yu8kFgIsCdxBgp//HF7MFhz5gzmPaRrDJ9Vi0WElD/nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ZRmhhrFhByAT9WzcaUcxoe8QvuBAfLxvxyss8bArhfY=; b=YXj7z5xSBQ1iFt4NEEtyWci5UhDE+4Pyy1Gx5ToJSyfCWHH2/0ILsb3sMw5fcpemx21cNJRvGn5n+Fyk+mLufmaRmUxcoGR1Z1675BhTcV4OYjkrc4sCbWDcB1L2Bs/xV4A5asc2rN4YLzPGEPazhb3uxk99fYuh3KYwPWNar87Zqry6pYrSpoiuKSKHD0IXFYLo6MPmg/Zv4243dPDDBqa5JbAfRVBS/quqI1swLh1YSlsj503xq/xegt3Dpj5cSd4wxge9k/W93q0yCDn8i9nicqGbUs+0HOhMZ7v2BUkt5xvSCczGXpcHOAKRioFghVfl6j3guc0soC27IaTteQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZRmhhrFhByAT9WzcaUcxoe8QvuBAfLxvxyss8bArhfY=; b=uBhSwsv6CXDgzBkE+TDihS992IRr2JzzaAHrzJdRguLii8J+F5znxaRW59RYduvIhEa6iDTxfCALnRLCJnJG51fJ5z52SNn/FZtUF5bgrLq3ljqG2Wcm9oVU9SL+8EdZtXiDTEFKdGqH3whwd4Qt+zBCatTgS/H50eOHsMqWRTxp+lw4AQSW3MUm+n1PF1mP/hAavznnOoFlR7BRV9cRyKUIAuWeMk7QqB/HmgdIvLRizwmte3oYfXp9AWFtz273CJPKgRl0fL4aO0DU/JHStoSuUwIFeWDNWh+7saGWHmX6PPe1JhKHgyOKB679Xt0oUIMqp7j1BE0srjFG0kdilQ== Received: from SJ0PR03CA0378.namprd03.prod.outlook.com (2603:10b6:a03:3a1::23) by PH7PR12MB6441.namprd12.prod.outlook.com (2603:10b6:510:1fb::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.26; Sun, 29 Oct 2023 16:33:05 +0000 Received: from CO1PEPF000044F1.namprd05.prod.outlook.com (2603:10b6:a03:3a1:cafe::58) by SJ0PR03CA0378.outlook.office365.com (2603:10b6:a03:3a1::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.26 via Frontend Transport; Sun, 29 Oct 2023 16:33:04 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000044F1.mail.protection.outlook.com (10.167.241.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6933.15 via Frontend Transport; Sun, 29 Oct 2023 16:33:04 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 29 Oct 2023 09:32:52 -0700 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Sun, 29 Oct 2023 09:32:48 -0700 From: Gregory Etelson To: CC: , , , "Ori Kam" , , Matan Azrad , Viacheslav Ovsiienko , Suanming Mou Subject: [PATCH 11/30] net/mlx5: fix query for NIC flow cap Date: Sun, 29 Oct 2023 18:31:43 +0200 Message-ID: <20231029163202.216450-11-getelson@nvidia.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231029163202.216450-1-getelson@nvidia.com> References: <20231029163202.216450-1-getelson@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F1:EE_|PH7PR12MB6441:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b3b59f6-8451-4ce8-821c-08dbd89cb9cc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +TUla8pxMT2UhjW+MQW2GlEEGikigZj/uQ8TlERWeNih9QvwOBYXPQ+hj6gPTlBtrYhfONzwHAQ252GaG/2IwvZi7bB65h9Gh54RAJilzqFVqXGRJoR8NMVpETjuBsA4rrgFOfjYVUsgroYhfz/4VxmSBCWJQR0NIm8OXDAbuW63jGWjVdx1rnU/CRmKWHmlR9bPFBNeMCp3yANCzz4JRuAbZ/PmPigU4bW9Xvo7FwJu/nUHEU6liSttlWeRI8RHFnwDuXMIzKq2Lw+e3StgM6GhxIg6U+d+TzeMGOAKu4HQJF3xDhaLxx2yrMn92rfb0xWNbgxQDAXC4hhcvkiUqCGVdL1/mHqksGVVf3Ooy1g7EF/+5GDSiBLG+//A8VAs+VL3tMvIMdfHiWbGz5p/3Mu4wOQlLcEt1ImFd5EgnQi1DkIhiI0nb1zcjH7BLT0Ut88qFdR2U8/YWwr3LfeZRP3+bpzr3wLQ5eGV+Cu38eGP9bebO5Gcq04bZfSJS5huhdoDqEQrPtbgdMPbNCW1cagWtONCgXHwDVF8A81uS5dBxdrG8lDZyMdAVQ063d4G1ZJFBj34VXgcorV4SQ7pidTk2goAJ9AD8Cxp+xAy8o+3VX/SJKT/1M213dq6k7v14uo3C87GTN1ZaEeVhvxgc5SurNDX2mnrdwxEZflLtm0vKDhNtkmmrrGDxgFe90aA/AFNU+MnOG87U2qaMISgLR7FZm5wYwoMOvHS9oMlEr9XaO+cJJ+mytDTV1URTxEU X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(136003)(39860400002)(346002)(396003)(376002)(230922051799003)(82310400011)(451199024)(64100799003)(186009)(1800799009)(36840700001)(46966006)(40470700004)(40460700003)(36756003)(1076003)(26005)(16526019)(6286002)(7636003)(336012)(426003)(5660300002)(356005)(6666004)(7696005)(2616005)(107886003)(82740400003)(8936002)(8676002)(47076005)(54906003)(316002)(41300700001)(6916009)(36860700001)(40480700001)(4744005)(55016003)(86362001)(478600001)(70586007)(70206006)(2906002)(4326008); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2023 16:33:04.5805 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b3b59f6-8451-4ce8-821c-08dbd89cb9cc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6441 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Ori Kam Add query for nic flow table support bit. Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers") Cc: bingz@nvidia.com Signed-off-by: Ori Kam --- drivers/common/mlx5/mlx5_devx_cmds.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index ff2d6d10b7..3afb2e9f80 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -1082,6 +1082,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, attr->striding_rq = MLX5_GET(cmd_hca_cap, hcattr, striding_rq); attr->ext_stride_num_range = MLX5_GET(cmd_hca_cap, hcattr, ext_stride_num_range); + attr->nic_flow_table = MLX5_GET(cmd_hca_cap, hcattr, nic_flow_table); attr->max_flow_counter_15_0 = MLX5_GET(cmd_hca_cap, hcattr, max_flow_counter_15_0); attr->max_flow_counter_31_16 = MLX5_GET(cmd_hca_cap, hcattr,