build: riscv is not a valid -march value

Message ID 20231121164903.3982163-1-christian.ehrhardt@canonical.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers
Series build: riscv is not a valid -march value |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/github-robot: build success github build: passed
ci/Intel-compilation success Compilation OK
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS

Commit Message

Christian Ehrhardt Nov. 21, 2023, 4:49 p.m. UTC
  From: Christian Ehrhardt <christian.ehrhardt@canonical.com>

If building riscv natively with -Dplatform=generic config/meson.build
will select cpu_instruction_set=riscv.

That was fine because config/riscv/meson.build did override it to valid
values later, but since b7676fcccab4 ("config: verify machine arch
flag") it will break the build as it tries to test -march=riscv which
is not a value value.

The generic setting used in most cases is rv64gc, set this here
as well.

Fixes: b7676fcccab4 ("config: verify machine arch flag"
Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")

Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
---
 config/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Sivaprasad Tummala Nov. 22, 2023, 1:27 p.m. UTC | #1
[AMD Official Use Only - General]

> -----Original Message-----
> From: christian.ehrhardt@canonical.com <christian.ehrhardt@canonical.com>
> Sent: Tuesday, November 21, 2023 10:19 PM
> To: dev <dev@dpdk.org>; Thomas Monjalon <thomas@monjalon.net>
> Cc: Luca Boccassi <bluca@debian.org>; Christian Ehrhardt
> <christian.ehrhardt@canonical.com>
> Subject: [PATCH] build: riscv is not a valid -march value
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
>
> If building riscv natively with -Dplatform=generic config/meson.build will select
> cpu_instruction_set=riscv.
>
> That was fine because config/riscv/meson.build did override it to valid values later,
> but since b7676fcccab4 ("config: verify machine arch
> flag") it will break the build as it tries to test -march=riscv which is not a value
> value.
>
> The generic setting used in most cases is rv64gc, set this here as well.
>
> Fixes: b7676fcccab4 ("config: verify machine arch flag"
> Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
>
> Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> ---
>  config/meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/config/meson.build b/config/meson.build index
> d732154731..a9ccd56deb 100644
> --- a/config/meson.build
> +++ b/config/meson.build
> @@ -152,7 +152,7 @@ if cpu_instruction_set == 'generic'
>      elif host_machine.cpu_family().startswith('ppc')
>          cpu_instruction_set = 'power8'
>      elif host_machine.cpu_family().startswith('riscv')
> -        cpu_instruction_set = 'riscv'
> +        cpu_instruction_set = 'rv64gc'
>      endif
>  endif
>
> --
> 2.34.1

LGTM!
Acked-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
  
David Marchand Nov. 22, 2023, 4:02 p.m. UTC | #2
On Tue, Nov 21, 2023 at 5:49 PM <christian.ehrhardt@canonical.com> wrote:
>
> From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
>
> If building riscv natively with -Dplatform=generic config/meson.build
> will select cpu_instruction_set=riscv.
>
> That was fine because config/riscv/meson.build did override it to valid
> values later, but since b7676fcccab4 ("config: verify machine arch
> flag") it will break the build as it tries to test -march=riscv which
> is not a value value.
>
> The generic setting used in most cases is rv64gc, set this here
> as well.
>
> Fixes: b7676fcccab4 ("config: verify machine arch flag")
> Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
>
> Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> ---
>  config/meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/config/meson.build b/config/meson.build
> index d732154731..a9ccd56deb 100644
> --- a/config/meson.build
> +++ b/config/meson.build
> @@ -152,7 +152,7 @@ if cpu_instruction_set == 'generic'
>      elif host_machine.cpu_family().startswith('ppc')
>          cpu_instruction_set = 'power8'
>      elif host_machine.cpu_family().startswith('riscv')
> -        cpu_instruction_set = 'riscv'
> +        cpu_instruction_set = 'rv64gc'

Copying more people.

This fix is probably the best, so close to the release.


However, I think a more complete fix would be to set this here to generic.
And do the march validation in config/riscv/meson.build in a similar
fashion to ARM.

Or maybe the validation added in b7676fcccab4 ("config: verify machine
arch flag") should be moved after subdir(arch_subdir).
Bruce, opinion?
  
Bruce Richardson Nov. 22, 2023, 4:17 p.m. UTC | #3
On Wed, Nov 22, 2023 at 05:02:56PM +0100, David Marchand wrote:
> On Tue, Nov 21, 2023 at 5:49 PM <christian.ehrhardt@canonical.com> wrote:
> >
> > From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> >
> > If building riscv natively with -Dplatform=generic config/meson.build
> > will select cpu_instruction_set=riscv.
> >
> > That was fine because config/riscv/meson.build did override it to valid
> > values later, but since b7676fcccab4 ("config: verify machine arch
> > flag") it will break the build as it tries to test -march=riscv which
> > is not a value value.
> >
> > The generic setting used in most cases is rv64gc, set this here
> > as well.
> >
> > Fixes: b7676fcccab4 ("config: verify machine arch flag")
> > Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
> >
> > Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> > ---
> >  config/meson.build | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/config/meson.build b/config/meson.build
> > index d732154731..a9ccd56deb 100644
> > --- a/config/meson.build
> > +++ b/config/meson.build
> > @@ -152,7 +152,7 @@ if cpu_instruction_set == 'generic'
> >      elif host_machine.cpu_family().startswith('ppc')
> >          cpu_instruction_set = 'power8'
> >      elif host_machine.cpu_family().startswith('riscv')
> > -        cpu_instruction_set = 'riscv'
> > +        cpu_instruction_set = 'rv64gc'
> 
> Copying more people.
> 
> This fix is probably the best, so close to the release.
> 

Agreed

> 
> However, I think a more complete fix would be to set this here to generic.
> And do the march validation in config/riscv/meson.build in a similar
> fashion to ARM.
> 
> Or maybe the validation added in b7676fcccab4 ("config: verify machine
> arch flag") should be moved after subdir(arch_subdir).
> Bruce, opinion?
> 

Probably the first of these two is best, to do the march validation in the
riscv-specific file. However, I've no strong opinions either way.

/Bruce

> 
> -- 
> David Marchand
>
  
David Marchand Nov. 22, 2023, 4:39 p.m. UTC | #4
On Tue, Nov 21, 2023 at 5:49 PM <christian.ehrhardt@canonical.com> wrote:
>
> From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
>
> If building riscv natively with -Dplatform=generic config/meson.build
> will select cpu_instruction_set=riscv.
>
> That was fine because config/riscv/meson.build did override it to valid
> values later, but since b7676fcccab4 ("config: verify machine arch
> flag") it will break the build as it tries to test -march=riscv which
> is not a value value.
>
> The generic setting used in most cases is rv64gc, set this here
> as well.
>
> Fixes: b7676fcccab4 ("config: verify machine arch flag")
> Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
>
> Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Acked-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>

Applied, thanks.
  
David Marchand Nov. 22, 2023, 4:41 p.m. UTC | #5
On Wed, Nov 22, 2023 at 5:17 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Wed, Nov 22, 2023 at 05:02:56PM +0100, David Marchand wrote:
> > On Tue, Nov 21, 2023 at 5:49 PM <christian.ehrhardt@canonical.com> wrote:
> > >
> > > From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> > >
> > > If building riscv natively with -Dplatform=generic config/meson.build
> > > will select cpu_instruction_set=riscv.
> > >
> > > That was fine because config/riscv/meson.build did override it to valid
> > > values later, but since b7676fcccab4 ("config: verify machine arch
> > > flag") it will break the build as it tries to test -march=riscv which
> > > is not a value value.
> > >
> > > The generic setting used in most cases is rv64gc, set this here
> > > as well.
> > >
> > > Fixes: b7676fcccab4 ("config: verify machine arch flag")
> > > Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
> > >
> > > Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> > > ---
> > >  config/meson.build | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/config/meson.build b/config/meson.build
> > > index d732154731..a9ccd56deb 100644
> > > --- a/config/meson.build
> > > +++ b/config/meson.build
> > > @@ -152,7 +152,7 @@ if cpu_instruction_set == 'generic'
> > >      elif host_machine.cpu_family().startswith('ppc')
> > >          cpu_instruction_set = 'power8'
> > >      elif host_machine.cpu_family().startswith('riscv')
> > > -        cpu_instruction_set = 'riscv'
> > > +        cpu_instruction_set = 'rv64gc'
> >
> > Copying more people.
> >
> > This fix is probably the best, so close to the release.
> >
>
> Agreed

I took this patch as is, for now.

>
> >
> > However, I think a more complete fix would be to set this here to generic.
> > And do the march validation in config/riscv/meson.build in a similar
> > fashion to ARM.
> >
> > Or maybe the validation added in b7676fcccab4 ("config: verify machine
> > arch flag") should be moved after subdir(arch_subdir).
> > Bruce, opinion?
> >
>
> Probably the first of these two is best, to do the march validation in the
> riscv-specific file. However, I've no strong opinions either way.

Stanislaw, could you look at doing some enhancement on this topic?
And, in any case, what we lack is a CI for RISC V.
  
Stanislaw Kardach Jan. 5, 2024, 3:50 p.m. UTC | #6
On Wed, Nov 22, 2023 at 5:41 PM David Marchand
<david.marchand@redhat.com> wrote:
>
> On Wed, Nov 22, 2023 at 5:17 PM Bruce Richardson
> <bruce.richardson@intel.com> wrote:
> >
> > On Wed, Nov 22, 2023 at 05:02:56PM +0100, David Marchand wrote:
> > > On Tue, Nov 21, 2023 at 5:49 PM <christian.ehrhardt@canonical.com> wrote:
> > > >
> > > > From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> > > >
> > > > If building riscv natively with -Dplatform=generic config/meson.build
> > > > will select cpu_instruction_set=riscv.
> > > >
> > > > That was fine because config/riscv/meson.build did override it to valid
> > > > values later, but since b7676fcccab4 ("config: verify machine arch
> > > > flag") it will break the build as it tries to test -march=riscv which
> > > > is not a value value.
> > > >
> > > > The generic setting used in most cases is rv64gc, set this here
> > > > as well.
> > > >
> > > > Fixes: b7676fcccab4 ("config: verify machine arch flag")
> > > > Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
> > > >
> > > > Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> > > > ---
> > > >  config/meson.build | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/config/meson.build b/config/meson.build
> > > > index d732154731..a9ccd56deb 100644
> > > > --- a/config/meson.build
> > > > +++ b/config/meson.build
> > > > @@ -152,7 +152,7 @@ if cpu_instruction_set == 'generic'
> > > >      elif host_machine.cpu_family().startswith('ppc')
> > > >          cpu_instruction_set = 'power8'
> > > >      elif host_machine.cpu_family().startswith('riscv')
> > > > -        cpu_instruction_set = 'riscv'
> > > > +        cpu_instruction_set = 'rv64gc'
> > >
> > > Copying more people.
> > >
> > > This fix is probably the best, so close to the release.
> > >
> >
> > Agreed
>
> I took this patch as is, for now.
Sorry for reviving an old thread, I was on a rather long OoO, hence I
did not answer.
Thank you for taking this patch.
>
> >
> > >
> > > However, I think a more complete fix would be to set this here to generic.
> > > And do the march validation in config/riscv/meson.build in a similar
> > > fashion to ARM.
> > >
> > > Or maybe the validation added in b7676fcccab4 ("config: verify machine
> > > arch flag") should be moved after subdir(arch_subdir).
> > > Bruce, opinion?
> > >
> >
> > Probably the first of these two is best, to do the march validation in the
> > riscv-specific file. However, I've no strong opinions either way.
>
> Stanislaw, could you look at doing some enhancement on this topic?
> And, in any case, what we lack is a CI for RISC V.
It seems that there is not much traction for RISC-V DPDK yet. StarFive
seems to be focused more on the platform side of things and therefore
I don't have any server-grade HW to really run CI on.
>
>
> --
> David Marchand
>


--
Best Regards,
Stanisław Kardach
  

Patch

diff --git a/config/meson.build b/config/meson.build
index d732154731..a9ccd56deb 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -152,7 +152,7 @@  if cpu_instruction_set == 'generic'
     elif host_machine.cpu_family().startswith('ppc')
         cpu_instruction_set = 'power8'
     elif host_machine.cpu_family().startswith('riscv')
-        cpu_instruction_set = 'riscv'
+        cpu_instruction_set = 'rv64gc'
     endif
 endif