From patchwork Tue Dec 12 11:32:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135060 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 71F68436D2; Tue, 12 Dec 2023 12:32:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 490E942E1B; Tue, 12 Dec 2023 12:32:38 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 252124026E for ; Tue, 12 Dec 2023 12:32:35 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380756; x=1733916756; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XxL+lwTbbj5h3+fPgAZHVUzH/LFKC2Y5KfeSxtqxMhk=; b=KMdYwbJFdxh5v3WL81wXFjb1TowDVLdE1kDn5JTnKNKuohNskoskpj5Z z+V47jFnvWo274NPbib5SeDUOYnTLYLdEyHMTuSfBJO37F7dSK/KGMua+ D/j4eLVLKeLU8MbRLg19Xqhccrh8Y62upIdKpre4Q852V/A8N6EX6ef6I GjkbA5l5CM7lqmBu/XWG9flFIpiZuevpm7eOr0MkZ7twjG3JStjYPggTt d47rFeubnv0dHzpbB09anToU2cxa+cQiATVI3J51JpPQ3NuxOJQFaa9bM KUy4R7DguKzB2L5XQJL0weWGn3nrt3W6vWa2VgcgcPfS6RJkAtu6fsFg3 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635840" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635840" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794685" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794685" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:34 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson Subject: [PATCH v3 1/9] eventdev: add capability flags for supported sched types Date: Tue, 12 Dec 2023 11:32:15 +0000 Message-Id: <20231212113223.31147-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Not all eventdev's support all scheduling types, for example, some may only support atomic scheduling or others only support ordered scheduling. There is currently no clear indication for each driver what sched types it supports, so add capability flags to be indicated on return from rte_event_dev_info_get() API. Similarly add the possible scheduling types to the capabilities table in the docs. Signed-off-by: Bruce Richardson Acked-by: Jerin Jacob --- doc/guides/eventdevs/features/default.ini | 3 +++ lib/eventdev/rte_eventdev.h | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/doc/guides/eventdevs/features/default.ini b/doc/guides/eventdevs/features/default.ini index e980ae134a..1cc4303fe5 100644 --- a/doc/guides/eventdevs/features/default.ini +++ b/doc/guides/eventdevs/features/default.ini @@ -6,6 +6,9 @@ ; the features table in the documentation. ; [Scheduling Features] +atomic_scheduling = +ordered_scheduling = +parallel_scheduling = queue_qos = event_qos = distributed_sched = diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index ec9b02455d..d48957362c 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -326,6 +326,27 @@ struct rte_event; * than one. */ +#define RTE_EVENT_DEV_CAP_ATOMIC (1ULL << 13) +/**< Event device is capable of atomic scheduling. + * When this flag is set, the application can configure queues with scheduling type + * atomic on this event device. + * @see RTE_SCHED_TYPE_ATOMIC + */ + +#define RTE_EVENT_DEV_CAP_ORDERED (1ULL << 14) +/**< Event device is capable of ordered scheduling. + * When this flag is set, the application can configure queues with scheduling type + * ordered on this event device. + * @see RTE_SCHED_TYPE_ORDERED + */ + +#define RTE_EVENT_DEV_CAP_PARALLEL (1ULL << 15) +/**< Event device is capable of parallel scheduling. + * When this flag is set, the application can configure queues with scheduling type + * parallel on this event device. + * @see RTE_SCHED_TYPE_PARALLEL + */ + /* Event device priority levels */ #define RTE_EVENT_DEV_PRIORITY_HIGHEST 0 /**< Highest priority expressed across eventdev subsystem