From patchwork Fri Dec 15 17:26:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Euan Bourke X-Patchwork-Id: 135237 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97F9143700; Fri, 15 Dec 2023 18:27:19 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6F0B94339A; Fri, 15 Dec 2023 18:27:00 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by mails.dpdk.org (Postfix) with ESMTP id 7B6B4433A8 for ; Fri, 15 Dec 2023 18:26:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702661218; x=1734197218; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zFQ2rHxu1X0r2TEHDZIX1mt9oK01LWnLJ4/zA2wqdLA=; b=Okktz0HkEiS0u18MJqJqTckbWBm9s/lMoKb7sS9X7+5Qve3HyYUlKDnn l9UKGRCo8csLiij8KBrted1cRrrI3iNbtxIaa7DWTimB+fHHIvun1hT2k JzLkcTAGbadEhvSebLXSvGwFAefDU6NE9g3+397zkUDblRRwmn8qnLFze Qp7QTl9qadxHQo6umd720z1CJGS3H6sn85tUCJfp3YXDGV/o5wo/9Tafj HSF0J+kcP8/fxX9gurGceDSiLR8CX2g8Y0LfcZ3MrHc85V4jCKEW3iCkN NiRDHFtl1dyscOXrr6m6kUEjtNzFVNICGH4BS4uhWIaJu0BQLRBGaaUpk A==; X-IronPort-AV: E=McAfee;i="6600,9927,10925"; a="2474251" X-IronPort-AV: E=Sophos;i="6.04,279,1695711600"; d="scan'208";a="2474251" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Dec 2023 09:26:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,279,1695711600"; d="scan'208";a="22914270" Received: from unknown (HELO silpixa00400630.ir.intel.com) ([10.237.213.151]) by orviesa001.jf.intel.com with ESMTP; 15 Dec 2023 09:26:57 -0800 From: Euan Bourke To: dev@dpdk.org Cc: Euan Bourke , Abdullah Sevincer Subject: [PATCH v4 5/8] event/dlb2: add new arg parsing library API support Date: Fri, 15 Dec 2023 17:26:29 +0000 Message-Id: <20231215172632.3102502-6-euan.bourke@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231215172632.3102502-1-euan.bourke@intel.com> References: <20231215172632.3102502-1-euan.bourke@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Switched the dlb2 driver to call the new arg parsing library instead of eal for coremask parsing, and updated the resource probe function to support the changed formatting of the API. Signed-off-by: Euan Bourke --- drivers/event/dlb2/dlb2_priv.h | 4 +- drivers/event/dlb2/pf/base/dlb2_resource.c | 51 +++++++++------------- 2 files changed, 21 insertions(+), 34 deletions(-) diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h index 31a3beeb6c..c14d83da5b 100644 --- a/drivers/event/dlb2/dlb2_priv.h +++ b/drivers/event/dlb2/dlb2_priv.h @@ -10,6 +10,7 @@ #include #include +#include #include "dlb2_user.h" #include "dlb2_log.h" #include "rte_pmd_dlb2.h" @@ -729,9 +730,6 @@ void dlb2_event_build_hcws(struct dlb2_port *qm_port, uint8_t *sched_type, uint8_t *queue_id); -/* Extern functions */ -extern int rte_eal_parse_coremask(const char *coremask, int *cores); - /* Extern globals */ extern struct process_local_port_data dlb2_port[][DLB2_NUM_PORT_TYPES]; diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c b/drivers/event/dlb2/pf/base/dlb2_resource.c index 7ce3e3531c..b65de9350a 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource.c +++ b/drivers/event/dlb2/pf/base/dlb2_resource.c @@ -922,49 +922,38 @@ dlb2_resource_probe(struct dlb2_hw *hw, const void *probe_args) { const struct dlb2_devargs *args = (const struct dlb2_devargs *)probe_args; const char *mask = args ? args->producer_coremask : NULL; - int cpu = 0, cnt = 0, cores[RTE_MAX_LCORE], i; + int cpu = 0, i; + uint16_t cores[RTE_MAX_LCORE]; if (args) { mask = (const char *)args->producer_coremask; } - if (mask && rte_eal_parse_coremask(mask, cores)) { + int ret = rte_arg_parse_coremask(mask, cores, RTE_DIM(cores)); + + if (mask && ret == -1) { DLB2_LOG_ERR(": Invalid producer coremask=%s", mask); return -1; } - hw->num_prod_cores = 0; - for (i = 0; i < RTE_MAX_LCORE; i++) { - bool is_pcore = (mask && cores[i] != -1); - - if (rte_lcore_is_enabled(i)) { - if (is_pcore) { - /* - * Populate the producer cores from parsed - * coremask - */ - hw->prod_core_list[cores[i]] = i; - hw->num_prod_cores++; - - } else if ((++cnt == DLB2_EAL_PROBE_CORE || - rte_lcore_count() < DLB2_EAL_PROBE_CORE)) { - /* - * If no producer coremask is provided, use the - * second EAL core to probe - */ - cpu = i; - break; - } - } else if (is_pcore) { + hw->num_prod_cores = ret; + /* Check for no producer cores and then get the second EAL core */ + if (hw->num_prod_cores > 0) + cpu = cores[0]; + else if (rte_lcore_count() < DLB2_EAL_PROBE_CORE) + cpu = rte_get_main_lcore(); + else + cpu = rte_get_next_lcore(-1, 1, 0); + + /* check our producer list is valid and error out if not */ + for (i = 0; i < hw->num_prod_cores; i++) { + if (!rte_lcore_is_enabled(cores[i])) { DLB2_LOG_ERR("Producer coremask(%s) must be a subset of EAL coremask", - mask); + mask); return -1; - } - } - /* Use the first core in producer coremask to probe */ - if (hw->num_prod_cores) - cpu = hw->prod_core_list[0]; + hw->prod_core_list[i] = cores[i]; +} dlb2_get_pp_allocation(hw, cpu, DLB2_LDB_PORT); dlb2_get_pp_allocation(hw, cpu, DLB2_DIR_PORT);