From patchwork Wed Dec 27 09:07:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bing Zhao X-Patchwork-Id: 135611 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D795437A9; Wed, 27 Dec 2023 10:08:42 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9E5454068A; Wed, 27 Dec 2023 10:08:22 +0100 (CET) Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2077.outbound.protection.outlook.com [40.107.102.77]) by mails.dpdk.org (Postfix) with ESMTP id F14C04067C for ; Wed, 27 Dec 2023 10:08:19 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=OzvaZAiamoeBIAMZuyEJOy+mhHF8whEi7/aH5MIAe3ubOLX/ffRlCf/DYsE80rnyg+aoTmMRI3omPMno2EHNwLdmsM8NKTOhgxHAxdO5EKogOvjCrmtqGZwUoq83ZA1c7yTBdd/RzA2PYNYhd+++Rb/TmBs2YSSGcahWCso3I6HwnhVUckKs3Dq2/kDx4qzRjGfXGCr/LRNwPgVYAO9m5Y05WjYW379WTckhVcvQtUBsEPSmaWM7OrekRAunWijQfZSy2FT6vmu9uB1iNvAgMetEDZMRsKC+P58L+4MBBoleVEyNWM9J2plmHIxtQxva6kUGJfOew/LV8B5fEWBWew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=zSy5kLIBh+OpSK28Gf3YOjoN3rmAFTWUInrNTaR82BA=; b=ZFgs9zNdDlqx/ZFsN7W2X+kSF710xnaB5wY+K5/Gxo0sZLkHq6JCwEUK8MjAbJOQ+I5wUZ0WtW8RiKda8IyjBxmKCwpn3Vzs+HxuVnCBlwgnB74SHslGyFLxm+BcZ2s7gTAINRtynPXzt4uf7cJPDjuJ9puV2eOgRVhaVmhChjrjch/xxd+cJKGgco9+LVkTRgIsR2kxYLn/rELsVD5nNVl4laG6b7ruakkHUrsjlAjwFEk0fZrw4L20nw9Bk24Bxkn0S0mca4/BczAirpayFAlr30plq9quYug6Lr5diL/5o1cJ3iX4OfH1PcjV+YWvByLRfbxpundu9O2W5G//8g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zSy5kLIBh+OpSK28Gf3YOjoN3rmAFTWUInrNTaR82BA=; b=tpPV3e2F0GQJixALU2wDXXNYIF0kVk3dR9QLN0f6ArjEFyLFqsIyOGDgHj+2dnc3yjLPtgBcDkVs1ynIeGmSZUcLT9rLztit9WLEmJd+igX+Vu9V7hTGCrOv5opSN0CZ+8uu9YUUvKsy9YUFvIvJe7f22psnaTIpqa4QkO2d74O7ma8D0IxE2sK0BESzY8GYJo1tbCldpdUk6DG0uhY5DtTMez4I2f6T4BnADoVFX8mkECEMsBwB/+BX5HYm4HaG+Ju3Xp8rzpx2UeQJdiIp3l8jAQt9sUPW/+YET6bvuu6eHFWSJQc2N+LayRT0SUHmyWnKL1PMpWx+UUmourE8pA== Received: from MN2PR16CA0002.namprd16.prod.outlook.com (2603:10b6:208:134::15) by IA0PR12MB7530.namprd12.prod.outlook.com (2603:10b6:208:440::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7113.29; Wed, 27 Dec 2023 09:08:17 +0000 Received: from MN1PEPF0000ECD5.namprd02.prod.outlook.com (2603:10b6:208:134:cafe::d8) by MN2PR16CA0002.outlook.office365.com (2603:10b6:208:134::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7113.27 via Frontend Transport; Wed, 27 Dec 2023 09:08:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by MN1PEPF0000ECD5.mail.protection.outlook.com (10.167.242.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7135.14 via Frontend Transport; Wed, 27 Dec 2023 09:08:17 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 27 Dec 2023 01:08:03 -0800 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 27 Dec 2023 01:07:59 -0800 From: Bing Zhao To: , , , , , , , , , , , Subject: [PATCH 3/8] net/mlx5: fetch the available registers for NAT64 Date: Wed, 27 Dec 2023 11:07:26 +0200 Message-ID: <20231227090731.2569427-4-bingz@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231227090731.2569427-1-bingz@nvidia.com> References: <20231227090731.2569427-1-bingz@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|IA0PR12MB7530:EE_ X-MS-Office365-Filtering-Correlation-Id: cf476f76-5d3a-4c9e-fa6a-08dc06bb5d6d X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wJsISoZNzKwjKXo/zGU5IBu7LIvzxbOYmawxhIpJaWst9rzTw6qMT+N3b4Fhop7rD3nvbg/vPaQMcpragw8q5WLvVDZyK5uWIN677/0qmOGmRcqlzKLCUp31oh/VLltu0gBljf7WRyJ3WYyki56GzwZ5IB8Vc7t3gsOajTqKc3X2P09L8sxJ/sbyTfz5M2PzHwnedJmNcaKElZV32hLBp1QuadWebQ5ioXXuxOyI+3vXEABiSaUCEHsYPT9PEyBZ3gcB1ODL5pJQOXOFKHr03Ht55NMSWs4SoFYlpKrrEEYKRr4M9+qdWHsze0AD0kvUzp0QRA+TcpgIIv8AdK1KVJKh+xe8opJry5zWcuWKm+xS/t80RUPgBfR9IWLQroTA52m0ydcfteYD/Sf4gnTrvtsZoemed9YnZCFnrO/No0y3bCvyheCXtT/yE1WvxIXyyMyHVFp1MiRQ7LltQrjl0mpvqxmcqDfF6WTd2YYJO6pC0XWAvzIo1uopWneMAiCjcPDetyUQqsEDp1uTrAFrJSqyo12yj5WYKHoDWhHocrBEknqkWR+05BT6JQVbUiELvMompPmcedTHUSXdRtyYb7z1BrmIXytXIyKGWUwNTwuuougviPbZoKqh76nJzz8OgZaxwj01qjACnL2v4LLZHDWH7ZmSy0Z6yfR7ql5IhkOGwk2EOiYfegDTzRAIXZaTFE153xMrCYU7k1wXpKDjqzfS+UV6Ry6KYceyGEPz+Qcw4e11obY8VKUmHkPxuGDaR5g28VRjFnfB/2wWbfeRTvrDISB4GMWJ84OvEaa0HME= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(136003)(396003)(39860400002)(346002)(376002)(230922051799003)(451199024)(64100799003)(82310400011)(186009)(1800799012)(40470700004)(36840700001)(46966006)(47076005)(41300700001)(2616005)(1076003)(336012)(426003)(6286002)(16526019)(26005)(82740400003)(356005)(7636003)(110136005)(36860700001)(316002)(8936002)(8676002)(5660300002)(2906002)(478600001)(6666004)(7696005)(6636002)(70206006)(70586007)(86362001)(36756003)(55016003)(40480700001)(921011)(40460700003)(131093003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Dec 2023 09:08:17.3876 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cf476f76-5d3a-4c9e-fa6a-08dc06bb5d6d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7530 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org REG_C_6 is used as the 1st one and since it is reserved internally by default, there is no impact. The remaining 2 registers will be fetched from the available TAGs array from right to left. They will not be masked in the array due to the fact that not all the rules will use NAT64 action. Signed-off-by: Bing Zhao --- drivers/net/mlx5/mlx5.c | 9 +++++++++ drivers/net/mlx5/mlx5.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 3a182de248..6f7b2aaa77 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1643,6 +1643,15 @@ mlx5_init_hws_flow_tags_registers(struct mlx5_dev_ctx_shared *sh) if (!!((1 << i) & masks)) reg->hw_avl_tags[j++] = mlx5_regc_value(i); } + /* + * Set the registers for NAT64 usage internally. REG_C_6 is always used. + * The other 2 registers will be fetched from right to left, at least 2 + * tag registers should be available. + */ + MLX5_ASSERT(j >= (MLX5_FLOW_NAT64_REGS_MAX - 1)); + reg->nat64_regs[0] = REG_C_6; + reg->nat64_regs[1] = reg->hw_avl_tags[j - 2]; + reg->nat64_regs[2] = reg->hw_avl_tags[j - 1]; } static void diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 263ebead7f..b73ab78870 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1407,10 +1407,12 @@ struct mlx5_hws_cnt_svc_mng { }; #define MLX5_FLOW_HW_TAGS_MAX 12 +#define MLX5_FLOW_NAT64_REGS_MAX 3 struct mlx5_dev_registers { enum modify_reg aso_reg; enum modify_reg hw_avl_tags[MLX5_FLOW_HW_TAGS_MAX]; + enum modify_reg nat64_regs[MLX5_FLOW_NAT64_REGS_MAX]; }; #if defined(HAVE_MLX5DV_DR) && \