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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CY4PEPF0000E9CE.mail.protection.outlook.com (10.167.241.141) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7249.19 via Frontend Transport; Thu, 1 Feb 2024 02:30:46 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 31 Jan 2024 18:30:31 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 31 Jan 2024 18:30:28 -0800 From: Suanming Mou To: , Matan Azrad , "Viacheslav Ovsiienko" , Ori Kam CC: Subject: [PATCH v4 3/3] net/mlx5: add compare item support Date: Thu, 1 Feb 2024 10:30:03 +0800 Message-ID: <20240201023004.425592-4-suanmingm@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240201023004.425592-1-suanmingm@nvidia.com> References: <20231214031227.363911-1-suanmingm@nvidia.com> <20240201023004.425592-1-suanmingm@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CE:EE_|DM4PR12MB9072:EE_ X-MS-Office365-Filtering-Correlation-Id: 514fd20c-236e-4cc6-5e19-08dc22cdcbec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2024 02:30:46.3735 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 514fd20c-236e-4cc6-5e19-08dc22cdcbec X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB9072 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The compare item allows adding flow match with comparison result. This commit adds compare item support to the PMD code. Due to HW limitation: - Only HWS supported. - Only 32-bit comparison is supported. - Only single compare flow is supported in the flow table. - Only match with compare result between packet fields is supported. Signed-off-by: Suanming Mou Acked-by: Ori Kam --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 7 +++ doc/guides/rel_notes/release_24_03.rst | 2 + drivers/net/mlx5/mlx5_flow.h | 3 ++ drivers/net/mlx5/mlx5_flow_hw.c | 75 +++++++++++++++++++++++++- 5 files changed, 86 insertions(+), 2 deletions(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 6261b7d657..30027f2ba1 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -56,6 +56,7 @@ Usage doc = Y [rte_flow items] aggr_affinity = Y +compare = Y conntrack = Y ecpri = Y esp = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 6e1e2df79a..fa013b03bb 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -816,6 +816,13 @@ Limitations The flow engine of a process cannot move from active to standby mode if preceding active application rules are still present and vice versa. +- Match with compare result item (``RTE_FLOW_ITEM_TYPE_COMPARE``): + + - Only supported in HW steering(``dv_flow_en`` = 2) mode. + - Only single flow is supported to the flow table. + - Only 32-bit comparison is supported. + - Only match with compare result between packet fields is supported. + Statistics ---------- diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 0d6d26b438..4e2cba8024 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -96,6 +96,8 @@ New Features * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_CLASS`` flow action. * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_DATA`` flow action. + * Added support for comparing result between packet fields or value. + Removed Items ------------- diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 3f0699e986..8641cf0537 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -280,6 +280,9 @@ enum mlx5_feature_name { /* Random ITEM */ #define MLX5_FLOW_ITEM_RANDOM (1ull << 54) +/* COMPARE ITEM */ +#define MLX5_FLOW_ITEM_COMPARE (1ull << 55) + /* Outer Masks. */ #define MLX5_FLOW_LAYER_OUTER_L3 \ (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 7510715189..471e8e4d17 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -426,6 +426,9 @@ flow_hw_matching_item_flags_get(const struct rte_flow_item items[]) case RTE_FLOW_ITEM_TYPE_GTP: last_item = MLX5_FLOW_LAYER_GTP; break; + case RTE_FLOW_ITEM_TYPE_COMPARE: + last_item = MLX5_FLOW_ITEM_COMPARE; + break; default: break; } @@ -4401,6 +4404,8 @@ flow_hw_table_create(struct rte_eth_dev *dev, rte_errno = EINVAL; goto it_error; } + if (item_templates[i]->item_flags & MLX5_FLOW_ITEM_COMPARE) + matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_HTABLE; ret = __atomic_fetch_add(&item_templates[i]->refcnt, 1, __ATOMIC_RELAXED) + 1; if (ret <= 1) { @@ -6712,6 +6717,66 @@ flow_hw_prepend_item(const struct rte_flow_item *items, return copied_items; } +static inline bool +flow_hw_item_compare_field_supported(enum rte_flow_field_id field) +{ + switch (field) { + case RTE_FLOW_FIELD_TAG: + case RTE_FLOW_FIELD_META: + case RTE_FLOW_FIELD_VALUE: + return true; + default: + break; + } + return false; +} + +static int +flow_hw_validate_item_compare(const struct rte_flow_item *item, + struct rte_flow_error *error) +{ + const struct rte_flow_item_compare *comp_m = item->mask; + const struct rte_flow_item_compare *comp_v = item->spec; + + if (unlikely(!comp_m)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare item mask is missing"); + if (comp_m->width != UINT32_MAX) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare item only support full mask"); + if (!flow_hw_item_compare_field_supported(comp_m->a.field) || + !flow_hw_item_compare_field_supported(comp_m->b.field)) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare item field not support"); + if (comp_m->a.field == RTE_FLOW_FIELD_VALUE && + comp_m->b.field == RTE_FLOW_FIELD_VALUE) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare between value is not valid"); + if (comp_v) { + if (comp_v->operation != comp_m->operation || + comp_v->a.field != comp_m->a.field || + comp_v->b.field != comp_m->b.field) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare item spec/mask not matching"); + if ((comp_v->width & comp_m->width) != 32) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "compare item only support full mask"); + } + return 0; +} + static int flow_hw_pattern_validate(struct rte_eth_dev *dev, const struct rte_flow_pattern_template_attr *attr, @@ -6722,6 +6787,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, int i, tag_idx; bool items_end = false; uint32_t tag_bitmap = 0; + int ret; if (!attr->ingress && !attr->egress && !attr->transfer) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR, NULL, @@ -6861,8 +6927,6 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, } case RTE_FLOW_ITEM_TYPE_GENEVE_OPT: { - int ret; - ret = mlx5_flow_geneve_tlv_option_validate(priv, &items[i], error); @@ -6870,6 +6934,13 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, return ret; break; } + case RTE_FLOW_ITEM_TYPE_COMPARE: + { + ret = flow_hw_validate_item_compare(&items[i], error); + if (ret) + return ret; + break; + } case RTE_FLOW_ITEM_TYPE_VOID: case RTE_FLOW_ITEM_TYPE_ETH: case RTE_FLOW_ITEM_TYPE_VLAN: