diff mbox series

dispatcher: add cache guard to per-lcore struct

Message ID 20240220083504.488208-1-mattias.ronnblom@ericsson.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series dispatcher: add cache guard to per-lcore struct |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS

Commit Message

Mattias Rönnblom Feb. 20, 2024, 8:35 a.m. UTC 
  Add cache guard to per-lcore data structures to prevent false sharing
in scenarios where a next-N-lines (or similar) hardware prefetcher is
used.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
---
 lib/dispatcher/rte_dispatcher.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Morten Brørup Feb. 20, 2024, 8:46 a.m. UTC | #1 
> From: Mattias Rönnblom [mailto:mattias.ronnblom@ericsson.com]
> Sent: Tuesday, 20 February 2024 09.35
> 
> Add cache guard to per-lcore data structures to prevent false sharing
> in scenarios where a next-N-lines (or similar) hardware prefetcher is
> used.
> 
> Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
> ---

Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Thomas Monjalon Feb. 22, 2024, 6:59 a.m. UTC | #2 
20/02/2024 09:46, Morten Brørup:
> > From: Mattias Rönnblom [mailto:mattias.ronnblom@ericsson.com]
> > Sent: Tuesday, 20 February 2024 09.35
> > 
> > Add cache guard to per-lcore data structures to prevent false sharing
> > in scenarios where a next-N-lines (or similar) hardware prefetcher is
> > used.
> > 
> > Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
> 
> Reviewed-by: Morten Brørup <mb@smartsharesystems.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index 95dd41b818..f546d75c0b 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -48,6 +48,7 @@  struct rte_dispatcher_lcore {
 	struct rte_dispatcher_lcore_port ports[EVD_MAX_PORTS_PER_LCORE];
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
+	RTE_CACHE_GUARD;
 } __rte_cache_aligned;
 
 struct rte_dispatcher {