net/mlx5: fix the HWS registers initialization
Checks
Commit Message
The method to initialize tag registers by using capability bits is
not supported on some old NICs. In the meanwhile, the HWS for flow
rule insertion is not supported either. There is no need to
initialize HWS only resource on the old NICs.
Fixes: 48041ccbaa8d ("net/mlx5: initialize HWS flow registers in shared context")
Cc: getelson@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
---
drivers/net/mlx5/mlx5.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Comments
Hi
> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Tuesday, February 27, 2024 5:26 PM
> To: dev@dpdk.org; Suanming Mou <suanmingm@nvidia.com>; Raslan
> Darawsheh <rasland@nvidia.com>
> Cc: Ori Kam <orika@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>;
> Matan Azrad <matan@nvidia.com>; Dariusz Sosnowski
> <dsosnowski@nvidia.com>; Gregory Etelson <getelson@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix the HWS registers initialization
>
> The method to initialize tag registers by using capability bits is not supported
> on some old NICs. In the meanwhile, the HWS for flow rule insertion is not
> supported either. There is no need to initialize HWS only resource on the old
> NICs.
>
> Fixes: 48041ccbaa8d ("net/mlx5: initialize HWS flow registers in shared
> context")
> Cc: getelson@nvidia.com
> Cc: stable@dpdk.org
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> Acked-by: Suanming Mou <suanmingm@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards
Raslan Darawsheh
@@ -1690,7 +1690,8 @@ mlx5_init_shared_dev_registers(struct mlx5_dev_ctx_shared *sh)
} else {
DRV_LOG(DEBUG, "ASO register: NONE");
}
- mlx5_init_hws_flow_tags_registers(sh);
+ if (sh->config.dv_flow_en == 2)
+ mlx5_init_hws_flow_tags_registers(sh);
}
static struct mlx5_physical_device *