From patchwork Sat Mar 2 09:38:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nagadheeraj Rottela X-Patchwork-Id: 137798 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E637D43C30; Sat, 2 Mar 2024 10:39:19 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6324E42DAC; Sat, 2 Mar 2024 10:38:55 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 3099542DD0 for ; Sat, 2 Mar 2024 10:38:53 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4229SnJk026333; Sat, 2 Mar 2024 01:38:52 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=uElbGPzDh2JtoHjmy/9cHWqCGEVxwBcZT7UpMBhRH2Y=; b=Bny 89Fp/hHZFMEdlFsmFQjKHAoIB+rDlzB4XeSIbs8idG12ljGoGQ6paBCtaW5oO4pL EsJl+fCAxElGjYNMwYOX1e9BsPRM7D4FaSD8/vbyZvrpdXlLzoUlSGpByy+58Mtc zRGZi3vXrpSFlvRL9/SYJXadctSee2L5nvdSHBJrfBURm6qdy2rNKArVeYbORmje mGw8dTukLzqdjJkmAPf/2S3RadViaFStX1SSGlUW5e55kM0m9x6OQemygSCIPUbt OZrygx4XUFlnUUHnLy9Yusrk/h2wUK2gU4oh2BHbGhutLXf0NbARAup4Up4zXpDc 3OSPuDXHacXxthlJFmA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wjfayafpg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 02 Mar 2024 01:38:52 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Sat, 2 Mar 2024 01:38:50 -0800 Received: from hyd1399.caveonetworks.com.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Sat, 2 Mar 2024 01:38:48 -0800 From: Nagadheeraj Rottela To: , , CC: , Nagadheeraj Rottela Subject: [PATCH v5 5/7] compress/nitrox: add software queue management Date: Sat, 2 Mar 2024 15:08:11 +0530 Message-ID: <20240302093813.14922-6-rnagadheeraj@marvell.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240302093813.14922-1-rnagadheeraj@marvell.com> References: <20240302093813.14922-1-rnagadheeraj@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: wd6F8JouGw-wMNNIyY_PGbLzYYZ0Lc9i X-Proofpoint-GUID: wd6F8JouGw-wMNNIyY_PGbLzYYZ0Lc9i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-02_04,2024-03-01_03,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added software queue management code corresponding to queue pair setup and release functions. Signed-off-by: Nagadheeraj Rottela --- drivers/compress/nitrox/nitrox_comp.c | 115 +++++++++++++++++++++++--- drivers/compress/nitrox/nitrox_comp.h | 1 + 2 files changed, 105 insertions(+), 11 deletions(-) diff --git a/drivers/compress/nitrox/nitrox_comp.c b/drivers/compress/nitrox/nitrox_comp.c index e97a686fbf..299cb8e783 100644 --- a/drivers/compress/nitrox/nitrox_comp.c +++ b/drivers/compress/nitrox/nitrox_comp.c @@ -5,11 +5,13 @@ #include #include #include +#include #include "nitrox_comp.h" #include "nitrox_device.h" #include "nitrox_logs.h" #include "nitrox_comp_reqmgr.h" +#include "nitrox_qp.h" static const char nitrox_comp_drv_name[] = RTE_STR(COMPRESSDEV_NAME_NITROX_PMD); static const struct rte_driver nitrox_rte_comp_drv = { @@ -17,6 +19,9 @@ static const struct rte_driver nitrox_rte_comp_drv = { .alias = nitrox_comp_drv_name }; +static int nitrox_comp_queue_pair_release(struct rte_compressdev *dev, + uint16_t qp_id); + static const struct rte_compressdev_capabilities nitrox_comp_pmd_capabilities[] = { { .algo = RTE_COMP_ALGO_DEFLATE, @@ -84,8 +89,15 @@ static void nitrox_comp_dev_stop(struct rte_compressdev *dev) static int nitrox_comp_dev_close(struct rte_compressdev *dev) { + int i, ret; struct nitrox_comp_device *comp_dev = dev->data->dev_private; + for (i = 0; i < dev->data->nb_queue_pairs; i++) { + ret = nitrox_comp_queue_pair_release(dev, i); + if (ret) + return ret; + } + rte_mempool_free(comp_dev->xform_pool); comp_dev->xform_pool = NULL; return 0; @@ -94,13 +106,33 @@ static int nitrox_comp_dev_close(struct rte_compressdev *dev) static void nitrox_comp_stats_get(struct rte_compressdev *dev, struct rte_compressdev_stats *stats) { - RTE_SET_USED(dev); - RTE_SET_USED(stats); + int qp_id; + + for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { + struct nitrox_qp *qp = dev->data->queue_pairs[qp_id]; + + if (!qp) + continue; + + stats->enqueued_count += qp->stats.enqueued_count; + stats->dequeued_count += qp->stats.dequeued_count; + stats->enqueue_err_count += qp->stats.enqueue_err_count; + stats->dequeue_err_count += qp->stats.dequeue_err_count; + } } static void nitrox_comp_stats_reset(struct rte_compressdev *dev) { - RTE_SET_USED(dev); + int qp_id; + + for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { + struct nitrox_qp *qp = dev->data->queue_pairs[qp_id]; + + if (!qp) + continue; + + memset(&qp->stats, 0, sizeof(qp->stats)); + } } static void nitrox_comp_dev_info_get(struct rte_compressdev *dev, @@ -121,19 +153,80 @@ static int nitrox_comp_queue_pair_setup(struct rte_compressdev *dev, uint16_t qp_id, uint32_t max_inflight_ops, int socket_id) { - RTE_SET_USED(dev); - RTE_SET_USED(qp_id); - RTE_SET_USED(max_inflight_ops); - RTE_SET_USED(socket_id); - return -1; + struct nitrox_comp_device *comp_dev = dev->data->dev_private; + struct nitrox_device *ndev = comp_dev->ndev; + struct nitrox_qp *qp = NULL; + int err; + + NITROX_LOG(DEBUG, "queue %d\n", qp_id); + if (qp_id >= ndev->nr_queues) { + NITROX_LOG(ERR, "queue %u invalid, max queues supported %d\n", + qp_id, ndev->nr_queues); + return -EINVAL; + } + + if (dev->data->queue_pairs[qp_id]) { + err = nitrox_comp_queue_pair_release(dev, qp_id); + if (err) + return err; + } + + qp = rte_zmalloc_socket("nitrox PMD qp", sizeof(*qp), + RTE_CACHE_LINE_SIZE, + socket_id); + if (!qp) { + NITROX_LOG(ERR, "Failed to allocate nitrox qp\n"); + return -ENOMEM; + } + + qp->type = NITROX_QUEUE_ZIP; + qp->qno = qp_id; + err = nitrox_qp_setup(qp, ndev->bar_addr, dev->data->name, + max_inflight_ops, ZIP_INSTR_SIZE, + socket_id); + if (unlikely(err)) + goto qp_setup_err; + + dev->data->queue_pairs[qp_id] = qp; + NITROX_LOG(DEBUG, "queue %d setup done\n", qp_id); + return 0; + +qp_setup_err: + rte_free(qp); + return err; } static int nitrox_comp_queue_pair_release(struct rte_compressdev *dev, uint16_t qp_id) { - RTE_SET_USED(dev); - RTE_SET_USED(qp_id); - return 0; + struct nitrox_comp_device *comp_dev = dev->data->dev_private; + struct nitrox_device *ndev = comp_dev->ndev; + struct nitrox_qp *qp; + int err; + + NITROX_LOG(DEBUG, "queue %d\n", qp_id); + if (qp_id >= ndev->nr_queues) { + NITROX_LOG(ERR, "queue %u invalid, max queues supported %d\n", + qp_id, ndev->nr_queues); + return -EINVAL; + } + + qp = dev->data->queue_pairs[qp_id]; + if (!qp) { + NITROX_LOG(DEBUG, "queue %u already freed\n", qp_id); + return 0; + } + + if (!nitrox_qp_is_empty(qp)) { + NITROX_LOG(ERR, "queue %d not empty\n", qp_id); + return -EAGAIN; + } + + dev->data->queue_pairs[qp_id] = NULL; + err = nitrox_qp_release(qp, ndev->bar_addr); + rte_free(qp); + NITROX_LOG(DEBUG, "queue %d release done\n", qp_id); + return err; } static int nitrox_comp_private_xform_create(struct rte_compressdev *dev, diff --git a/drivers/compress/nitrox/nitrox_comp.h b/drivers/compress/nitrox/nitrox_comp.h index 90e1931b05..e49debaf6b 100644 --- a/drivers/compress/nitrox/nitrox_comp.h +++ b/drivers/compress/nitrox/nitrox_comp.h @@ -18,6 +18,7 @@ #define NITROX_COMP_LEVEL_MEDIUM_END 6 #define NITROX_COMP_LEVEL_BEST_START 7 #define NITROX_COMP_LEVEL_BEST_END 9 +#define ZIP_INSTR_SIZE 64 struct nitrox_comp_device { struct rte_compressdev *cdev;