From patchwork Tue Mar 12 18:06:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138259 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9D98043C94; Tue, 12 Mar 2024 19:08:31 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2710342E2E; Tue, 12 Mar 2024 19:08:00 +0100 (CET) Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) by mails.dpdk.org (Postfix) with ESMTP id 8FA3542E34 for ; Tue, 12 Mar 2024 19:07:56 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1710266877; x=1741802877; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=4Z0Eh1zICcdCZp/QHNJLF33YBet32TzKNvPiJO0XXgk=; b=gyRVTWo7yTVeeJYPjcqFilrfjSOJeo402xotpttB/1Ht99UyRc/Efcao DoQeO+3FWdVoo6A19FpHKuWeZ4DVW/TBYr+3XZRKWnMP9SMb3EwF33jvE SkUrgYjQBMAUkON4ssS4zgQhjCzJSnQXnDU/HfPYSMiRYgKV8ha+R9oPO w=; X-IronPort-AV: E=Sophos;i="6.07,119,1708387200"; d="scan'208";a="387284681" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-2101.iad2.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Mar 2024 18:07:56 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:57548] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.39.71:2525] with esmtp (Farcaster) id 23ae1c4e-defd-47e1-9b81-9905f8d30e0d; Tue, 12 Mar 2024 18:07:53 +0000 (UTC) X-Farcaster-Flow-ID: 23ae1c4e-defd-47e1-9b81-9905f8d30e0d Received: from EX19D007EUA002.ant.amazon.com (10.252.50.68) by EX19MTAEUC001.ant.amazon.com (10.252.51.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 12 Mar 2024 18:07:48 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA002.ant.amazon.com (10.252.50.68) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Tue, 12 Mar 2024 18:07:48 +0000 Received: from HFA15-CG15235BS.amazon.com (10.85.143.174) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Tue, 12 Mar 2024 18:07:46 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v4 11/31] net/ena/base: use correct read once on u8 field Date: Tue, 12 Mar 2024 20:06:56 +0200 Message-ID: <20240312180716.8515-12-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240312180716.8515-1-shaibran@amazon.com> References: <20240312180716.8515-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The flags field in ena_eth_io_tx_cdesc is 8-bits long. The current macro used is READ_ONCE16. Switching to READ_ONCE8 to avoid reading extra data. Given that there's an implicit cast to u8 in the assignment, the correct value is being read, but this change makes it even more accurate. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/base/ena_eth_com.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h index cee4f35124..6a7c17f84f 100644 --- a/drivers/net/ena/base/ena_eth_com.h +++ b/drivers/net/ena/base/ena_eth_com.h @@ -219,7 +219,7 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, * expected, it mean that the device still didn't update * this completion. */ - cdesc_phase = READ_ONCE16(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; + cdesc_phase = READ_ONCE8(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; if (cdesc_phase != expected_phase) return ENA_COM_TRY_AGAIN;