net/ice: fix EIPT check is always true

Message ID 20240408151617.2095307-1-shiyangx.he@intel.com (mailing list archive)
State Superseded
Headers
Series net/ice: fix EIPT check is always true |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS

Commit Message

Shiyang He April 8, 2024, 3:16 p.m. UTC
  When enabling hardware outer UDP TX offload checksum, the EIPT judgment
is always true because ICE_TX_CTX_EIPT_NONE = 0x0.

This patch fixes it by checking the non-zero EIPT flag.

Fixes: 2ed011776334 ("net/ice: fix outer UDP Tx checksum offload")
Cc: stable@dpdk.org

Signed-off-by: Shiyang He <shiyangx.he@intel.com>
---
 drivers/net/ice/ice_rxtx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

David Marchand April 8, 2024, 9:28 a.m. UTC | #1
On Mon, Apr 8, 2024 at 9:55 AM Shiyang He <shiyangx.he@intel.com> wrote:
>
> When enabling hardware outer UDP TX offload checksum, the EIPT judgment
> is always true because ICE_TX_CTX_EIPT_NONE = 0x0.
>
> This patch fixes it by checking the non-zero EIPT flag.

Duplicate of: https://patchwork.dpdk.org/project/dpdk/patch/20240405144604.906695-2-david.marchand@redhat.com/.
  

Patch

diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 13aabe97a5..3e2264de7d 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -2751,7 +2751,7 @@  ice_parse_tunneling_params(uint64_t ol_flags,
 	 * Calculate the tunneling UDP checksum.
 	 * Shall be set only if L4TUNT = 01b and EIPT is not zero
 	 */
-	if (!(*cd_tunneling & ICE_TX_CTX_EIPT_NONE) &&
+	if ((*cd_tunneling & ICE_TXD_CTX_QW0_EIPT_M) != ICE_TX_CTX_EIPT_NONE &&
 		(*cd_tunneling & ICE_TXD_CTX_UDP_TUNNELING) &&
 		(ol_flags & RTE_MBUF_F_TX_OUTER_UDP_CKSUM))
 		*cd_tunneling |= ICE_TXD_CTX_QW0_L4T_CS_M;