From patchwork Thu Apr 25 08:58:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Mattias_R=C3=B6nnblom?= X-Patchwork-Id: 139674 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C3E6A43F04; Thu, 25 Apr 2024 11:10:12 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61639436CE; Thu, 25 Apr 2024 11:10:03 +0200 (CEST) Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2080.outbound.protection.outlook.com [40.107.21.80]) by mails.dpdk.org (Postfix) with ESMTP id 313AB436C0 for ; Thu, 25 Apr 2024 11:10:00 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=n22qQnuV3oAebAK7qtO2umi8Wwxzdkdnn5kYqtak3FNwVRzBhBQOk/gPgiveA7XcZFCGC8uZfmEOTY1J5jsf0d+7ReKqfWMkHsOoARZ0XFWi6WDiprEewP/oPbJab520RXwZU52bn6OboO17kbEfgAnFRK82y85XoICtFcP3lBM4IZBRSs8ieDpDdShLzX6nVcHVQH6NaNM+FiLIkSuTFCWZz3UNqKnUGP5VkTo3UIF85eATKSuhlSYrxaTEBI/H/khOjcuqadQ0OCQX59BnlPfdg+VXDsDxlq24k60tXaqUwyDPs/1qcEnD9Dkf8WeARLMI+6qwvUxy7JisMJa70g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=L1XCW1dzUR2ggKoBcDUrz5OYrvcTpPDIoxhI9dWGFtM=; b=MVC0sWmhGMQaXMdctQKd3RhGWb+SFRR00rmQQfTrHoWuCq4RipV+guYXDuayorAYnsZgrX4LyF3Bnq7cP0k7tIiERF0bRI41zNgLZAtHqkPZyywSU7xhjgLRwKFxfQrd3t91xwyjiCZ75g/LkIqcTm1FABAAImtadHA00IbZHc3ArqZaMRhIIP3IGG/krYhntKkL7N3oMof7VUtw0RHefjOdYLgl+FrU0Ot9pFl+KJaMtCJAh39fytW94PN6RUn7DMelXuKiwOHht1hnWWSuCWPXOaE7PqYwsGx/pQGox2XFDr/OnrS5lzmwgT/lffiByFifLox3Zr7SuWg2fZz3Qw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 192.176.1.74) smtp.rcpttodomain=dpdk.org smtp.mailfrom=ericsson.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=ericsson.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ericsson.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=L1XCW1dzUR2ggKoBcDUrz5OYrvcTpPDIoxhI9dWGFtM=; b=OG+WOvbKE91AO0eW7h+xZRf52qOOVU8Uxny3kyyq7iKajhHdl3Ruiuo5VMWKuUPKGT706af7qo4eAkkazHe/EuCAeQ+uxiFp6ugdhbGn8UwP8XpxAywjMOk5y8/LDAcnMol05dJo8NPdYXdUhmvPeaCO7rR8AinSgsHxc5oHW7ghrvVbASMxLjcnC50oDjRDVd0XGB0+uXPrKUoI8jZZidF9saCDjT6SJ91oOb5Xklbcxy127ZH08Pfm7EpkLEue3H9OCsLHpmWVaqWxOkz6woSqv+j0LgAvr3I1vTQPN79NVmF3xEEUwmgNwkgqtNY5sHkZ8OnaPxYJY0gBsqaBzA== Received: from DB7PR05CA0023.eurprd05.prod.outlook.com (2603:10a6:10:36::36) by AS8PR07MB7445.eurprd07.prod.outlook.com (2603:10a6:20b:2af::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7472.39; Thu, 25 Apr 2024 09:09:58 +0000 Received: from DB5PEPF00014B94.eurprd02.prod.outlook.com (2603:10a6:10:36::4) by DB7PR05CA0023.outlook.office365.com (2603:10a6:10:36::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.25 via Frontend Transport; Thu, 25 Apr 2024 09:09:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 192.176.1.74) smtp.mailfrom=ericsson.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=ericsson.com; Received-SPF: Pass (protection.outlook.com: domain of ericsson.com designates 192.176.1.74 as permitted sender) receiver=protection.outlook.com; client-ip=192.176.1.74; helo=oa.msg.ericsson.com; pr=C Received: from oa.msg.ericsson.com (192.176.1.74) by DB5PEPF00014B94.mail.protection.outlook.com (10.167.8.232) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7519.19 via Frontend Transport; Thu, 25 Apr 2024 09:09:58 +0000 Received: from seliicinfr00050.seli.gic.ericsson.se (153.88.142.248) by smtp-central.internal.ericsson.com (100.87.178.62) with Microsoft SMTP Server id 15.2.1544.9; Thu, 25 Apr 2024 11:09:57 +0200 Received: from breslau.. (seliicwb00002.seli.gic.ericsson.se [10.156.25.100]) by seliicinfr00050.seli.gic.ericsson.se (Postfix) with ESMTP id C0E491C006A; Thu, 25 Apr 2024 11:09:57 +0200 (CEST) From: =?utf-8?q?Mattias_R=C3=B6nnblom?= To: CC: , Heng Wang , "Stephen Hemminger" , Tyler Retzlaff , =?utf-8?q?Mattias_R=C3=B6nnb?= =?utf-8?q?lom?= Subject: [RFC v2 3/6] eal: add exactly-once bit access functions Date: Thu, 25 Apr 2024 10:58:50 +0200 Message-ID: <20240425085853.97888-4-mattias.ronnblom@ericsson.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425085853.97888-1-mattias.ronnblom@ericsson.com> References: <20240302135328.531940-2-mattias.ronnblom@ericsson.com> <20240425085853.97888-1-mattias.ronnblom@ericsson.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5PEPF00014B94:EE_|AS8PR07MB7445:EE_ X-MS-Office365-Filtering-Correlation-Id: 0c34275c-8b5c-4219-85b1-08dc65077b1e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: =?utf-8?q?WlQZTznwYSckNGULqmVrqzvKikkzVml?= =?utf-8?q?sTVoZ0cvtbQtOvAXJ3Dq27KdgZCTyHONL6DeTiohtoXisNM5ibs3EX7p4TdvHqzJ6?= =?utf-8?q?qEknMRYuolcKrmD43Sn/sQGpYDoVWIVJU/+2zCrkW8PZRN97VcJvcrJjSmPNYAVL2?= =?utf-8?q?2i4DKA/Vu/nqLUP1Mx+r3oYFGeXyIjxLjBSUT/ADwKmMrntOwBRg1+OdSUr135hBJ?= =?utf-8?q?9FHOD99K1+Z/bR6J7l5rD81mGQtzA+LqTGLJ3mLfQtTpI+KtD0G7sdD6De9SttAFj?= =?utf-8?q?hegq6bII0A3GPSh6gmXEufGJkk0wLpg2tJRo1WH8qk0bnqQWvMIp17iV6mWdFte0B?= =?utf-8?q?PmgP6y7XYzgREv443FJ866gt42QvPMwgZ61wdK43toPNGVlCuCWNXRmZOfSpWzU0F?= =?utf-8?q?9+AAbLWxz7Rqy4qhVPEgW5D5s8QBzhWKhKwWmLJ2U8LJ4XSG+wjfRcUxFog2tZFVA?= =?utf-8?q?z86SMDfirds/1U5djeDarFsIbQbBos0R8iaGerVnraHc+nSvfLbPxqTbzWoEZyOxL?= =?utf-8?q?C/a+WaMIRKC2ptf+N9SJKenHGCNHJlM5hh/i+qL8yR7VeVhf+M5jWEgPXoAfW3GBi?= =?utf-8?q?mSGYJ2BRM8kdKmEvrizTc6mvF0uTO2hRMK3RBaU1g9GYXvvzqgi+K1x7CUHpW12ds?= =?utf-8?q?9vRo4JYoF4o0OADGewpMVQKMqlzFrQvye+JiDd+Tf1Q6MX5zPvA3hF7cpti2TAgT9?= =?utf-8?q?7ZHvSVL4OezqJp7DESXStDx4C0SiLCiFYJlgPzBOxx0qbALUuNjDJwKAnk5dktsep?= =?utf-8?q?WV+FHVGIl3XQCGdqpJueh14Y+8xO0s2hmjki/s9f3dZ016AHo4JwUav0d8KhbH9bv?= =?utf-8?q?r7HLJvjPB+BCHmX4rWaWVIgEDE3lX7bz4kebr/lMhzkVs69CcXRrAN74iCzX41Ir/?= =?utf-8?q?Jqfr5AmtRjrQTvCL03yoBXOopBpzNXIe46JEmbjbn6OVPrw7L577uEoYS7Cn5kkyD?= =?utf-8?q?mIs1NG0h5e9AepT/KUVv+j83XfvozlchghDJNXb/eg+m85K211sq7NombrpUWhmTv?= =?utf-8?q?IMoFjOUm7Ac/fosREogZUrGAttr3bU4zabkYkgkK3uLpkvJhpXbCMJPSrrcAQyrRs?= =?utf-8?q?KzIqGIcLW5ZF900LTc8KOCHnmpKaGfI35n8KHd1MjRo+c2WE+r6XdjUVqzJbP6W2E?= =?utf-8?q?ZvPOYkcvnvj1Jgqfa6zbYT9Jtme8EDbg77WYHPldrnHn3RBZhgKFOra/ZV/EQiRjr?= =?utf-8?q?o2QlEeNlcSdZVIs/cGtydsx70x5sZBDKnQDuxmFZLd2ffVbLxk57wT0scdhyrXnfs?= =?utf-8?q?JtP/xAShw7Gvno3Ti9qTDjOwBFpTP4ndSPmFKJW6arhVT1jghFqlDxV8=3D?= X-Forefront-Antispam-Report: CIP:192.176.1.74; CTRY:SE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:oa.msg.ericsson.com; PTR:office365.se.ericsson.net; CAT:NONE; SFS:(13230031)(36860700004)(82310400014)(376005)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: ericsson.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 09:09:58.3604 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0c34275c-8b5c-4219-85b1-08dc65077b1e X-MS-Exchange-CrossTenant-Id: 92e84ceb-fbfd-47ab-be52-080c6b87953f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=92e84ceb-fbfd-47ab-be52-080c6b87953f; Ip=[192.176.1.74]; Helo=[oa.msg.ericsson.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B94.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR07MB7445 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add bit test/set/clear/assign functions which prevents certain compiler optimizations and guarantees that program-level memory loads and/or stores will actually occur. These functions are useful when interacting with memory-mapped hardware devices. The "once" family of functions does not promise atomicity and provides no memory ordering guarantees beyond the C11 relaxed memory model. Signed-off-by: Mattias Rönnblom --- lib/eal/include/rte_bitops.h | 170 +++++++++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/lib/eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h index 75a29fdfe0..a2746e657f 100644 --- a/lib/eal/include/rte_bitops.h +++ b/lib/eal/include/rte_bitops.h @@ -201,6 +201,147 @@ extern "C" { uint32_t *: __rte_bit_assign32, \ uint64_t *: __rte_bit_assign64)(addr, nr, value) +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Generic selection macro to test exactly once the value of a bit in + * a 32-bit or 64-bit word. The type of operation depends on the type + * of the @c addr parameter. + * + * This function is guaranteed to result in exactly one memory load + * (e.g., it may not be eliminate or merged by the compiler). + * + * \code{.c} + * rte_bit_once_set(addr, 17); + * if (rte_bit_once_test(addr, 17)) { + * ... + * } + * \endcode + * + * In the above example, rte_bit_once_set() may not be removed by + * the compiler, which would be allowed in case rte_bit_set() and + * rte_bit_test() was used. + * + * \code{.c} + * while (rte_bit_once_test(addr, 17); + * ; + * \endcode + * + * In case rte_bit_test(addr, 17) was used instead, the resulting + * object code could (and in many cases would be) replaced with + * the equivalent to + * \code{.c} + * if (rte_bit_test(addr, 17)) { + * for (;;) // spin forever + * ; + * } + * \endcode + * + * rte_bit_once_test() does not give any guarantees in regards to + * memory ordering or atomicity. + * + * The regular bit set operations (e.g., rte_bit_test()) should be + * preferred over the "once" family of operations (e.g., + * rte_bit_once_test()) if possible, since the latter may prevent + * optimizations crucial for run-time performance. + * + * @param addr + * A pointer to the word to query. + * @param nr + * The index of the bit. + * @return + * Returns true if the bit is set, and false otherwise. + */ + +#define rte_bit_once_test(addr, nr) \ + _Generic((addr), \ + uint32_t *: __rte_bit_once_test32, \ + uint64_t *: __rte_bit_once_test64)(addr, nr) + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Set bit in word exactly once. + * + * Set bit specified by @c nr in the word pointed to by @c addr to '1' + * exactly once. + * + * This function is guaranteed to result in exactly one memory load + * and exactly one memory store, *or* an atomic bit set operation. + * + * See rte_bit_test_once32() for more information and uses cases for + * the "once" class of functions. + * + * This macro does not give any guarantees in regards to memory + * ordering or atomicity. + * + * @param addr + * A pointer to the word to modify. + * @param nr + * The index of the bit. + */ +#define rte_bit_once_set(addr, nr) \ + _Generic((addr), \ + uint32_t *: __rte_bit_once_set32, \ + uint64_t *: __rte_bit_once_set64)(addr, nr) + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Clear bit in word exactly once. + * + * Set bit specified by @c nr in the word pointed to by @c addr to '0' + * exactly once. + * + * This function is guaranteed to result in exactly one memory load + * and exactly one memory store, *or* an atomic bit clear operation. + * + * See rte_bit_test_once32() for more information and uses cases for + * the "once" class of functions. + * + * This macro does not give any guarantees in regards to memory + * ordering or atomicity. + * + * @param addr + * A pointer to the word to modify. + * @param nr + * The index of the bit. + */ +#define rte_bit_once_clear(addr, nr) \ + _Generic((addr), \ + uint32_t *: __rte_bit_once_clear32, \ + uint64_t *: __rte_bit_once_clear64)(addr, nr) + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice. + * + * Assign a value to bit in a word exactly once. + * + * Set bit specified by @c nr in the word pointed to by @c addr to the + * value indicated by @c value exactly once. + * + * This function is guaranteed to result in exactly one memory load + * and exactly one memory store, *or* an atomic bit clear operation. + * + * This function does not give any guarantees in regards to memory + * ordering or atomicity. + * + * @param addr + * A pointer to the word to modify. + * @param nr + * The index of the bit. + * @param value + * The new value of the bit - true for '1', or false for '0'. + */ +#define rte_bit_once_assign(addr, nr, value) \ + _Generic((addr), \ + uint32_t *: __rte_bit_once_assign32, \ + uint64_t *: __rte_bit_once_assign64)(addr, nr, value) + #define __RTE_GEN_BIT_TEST(name, size, qualifier) \ static inline bool \ name(const qualifier uint ## size ## _t *addr, unsigned int nr) \ @@ -239,6 +380,14 @@ __RTE_GEN_BIT_TEST(__rte_bit_test64, 64,) __RTE_GEN_BIT_SET(__rte_bit_set64, 64,) __RTE_GEN_BIT_CLEAR(__rte_bit_clear64, 64,) +__RTE_GEN_BIT_TEST(__rte_bit_once_test32, 32, volatile) +__RTE_GEN_BIT_SET(__rte_bit_once_set32, 32, volatile) +__RTE_GEN_BIT_CLEAR(__rte_bit_once_clear32, 32, volatile) + +__RTE_GEN_BIT_TEST(__rte_bit_once_test64, 64, volatile) +__RTE_GEN_BIT_SET(__rte_bit_once_set64, 64, volatile) +__RTE_GEN_BIT_CLEAR(__rte_bit_once_clear64, 64, volatile) + __rte_experimental static inline void __rte_bit_assign32(uint32_t *addr, unsigned int nr, bool value) @@ -259,6 +408,27 @@ __rte_bit_assign64(uint64_t *addr, unsigned int nr, bool value) __rte_bit_clear64(addr, nr); } + +__rte_experimental +static inline void +__rte_bit_once_assign32(uint32_t *addr, unsigned int nr, bool value) +{ + if (value) + __rte_bit_once_set32(addr, nr); + else + __rte_bit_once_clear32(addr, nr); +} + +__rte_experimental +static inline void +__rte_bit_once_assign64(volatile uint64_t *addr, unsigned int nr, bool value) +{ + if (value) + __rte_bit_once_set64(addr, nr); + else + __rte_bit_once_clear64(addr, nr); +} + /*------------------------ 32-bit relaxed operations ------------------------*/ /**