From patchwork Fri May 17 07:44:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 140161 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1F5E244048; Fri, 17 May 2024 09:44:58 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 03C624029F; Fri, 17 May 2024 09:44:58 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 41C1140268 for ; Fri, 17 May 2024 09:44:57 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44GNc4iK015520 for ; Fri, 17 May 2024 00:44:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=pfpt0220; bh=7DFk4DEK SrtLiwyRZwGCzUUJL6GfOVHf8VUhZrVGmSw=; b=Pvq7lTr7J2mWxPww8siplS6W 2hUTWJKG0f8loDY+MT1Q4BoSFWoarK4URJpQS5eFjC5MxjArO3PyZjWaSF/wOsT1 HU/4JFq3gyXIYjyDbQWcWpHfiLLx4dxOZN+UEU5ldCTZcM64xfeg2X/wGF1wb/wB Rx5tz6VqNHuuyUrQ6ZQmJR7AYJQYdnpYlE6+OsJSDCqeJd5j1Ae+G370zhmIL74G ZFoosbF75/jGmrQNcJRJu0lQLZLdus9n9pbJXIANpgJxjtRer5iDDhnQxx3fVwjD t4/kVrTzVGHxRiRdqxX1QYQwKcNmOL1BQQzqhtzFCPprgL7niyUzmlUDMQ2npw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3y5t0vhc2m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 17 May 2024 00:44:55 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Fri, 17 May 2024 00:44:55 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Fri, 17 May 2024 00:44:54 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id AAFA43F7059; Fri, 17 May 2024 00:44:52 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: , Subject: [PATCH 01/10] common/cnxk: sync VF root weight with kernel Date: Fri, 17 May 2024 13:14:39 +0530 Message-ID: <20240517074448.3146611-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: wEjZqZlKTJGKk2ndmPusLmHHtDN57vFw X-Proofpoint-GUID: wEjZqZlKTJGKk2ndmPusLmHHtDN57vFw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao By default set VF root scheduling weight same as other kernel configured VFs. Also fix a compilation issue when cflags has -Werror=shadow=compatible-local. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix.h | 1 + drivers/common/cnxk/roc_nix_queue.c | 3 ++- drivers/common/cnxk/roc_nix_tm.c | 6 +++++- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index bd3e540f45..63bcd5b25e 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -473,6 +473,7 @@ struct roc_nix { bool force_rx_aura_bp; bool custom_meta_aura_ena; bool rx_inj_ena; + uint32_t root_sched_weight; /* End of input parameters */ /* LMT line base for "Per Core Tx LMT line" mode*/ uintptr_t lmt_base; diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index ae4e0ea40c..f5441e0e6b 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -1030,7 +1030,8 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) thr = PLT_DIV_CEIL((nb_sqb_bufs * ROC_NIX_SQB_THRESH), 100); nb_sqb_bufs += NIX_SQB_PREFETCH; /* Clamp up the SQB count */ - nb_sqb_bufs = PLT_MIN(roc_nix->max_sqb_count, (uint16_t)PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs)); + nb_sqb_bufs = PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs); + nb_sqb_bufs = PLT_MIN(roc_nix->max_sqb_count, (uint16_t)nb_sqb_bufs); sq->nb_sqb_bufs = nb_sqb_bufs; sq->sqes_per_sqb_log2 = (uint16_t)plt_log2_u32(sqes_per_sqb); diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c index 4e6a28f827..ac522f8235 100644 --- a/drivers/common/cnxk/roc_nix_tm.c +++ b/drivers/common/cnxk/roc_nix_tm.c @@ -1589,7 +1589,11 @@ nix_tm_prepare_default_tree(struct roc_nix *roc_nix) node->id = nonleaf_id; node->parent_id = parent; node->priority = 0; - node->weight = NIX_TM_DFLT_RR_WT; + /* Default VF root RR_QUANTUM is in sync with kernel */ + if (lvl == ROC_TM_LVL_ROOT && !nix_tm_have_tl1_access(nix)) + node->weight = roc_nix->root_sched_weight; + else + node->weight = NIX_TM_DFLT_RR_WT; node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE; node->lvl = lvl; node->tree = ROC_NIX_TM_DEFAULT;