From patchwork Mon Aug 5 13:34:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yong Zhang X-Patchwork-Id: 142897 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7084945741; Mon, 5 Aug 2024 15:45:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61436402CA; Mon, 5 Aug 2024 15:45:54 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.40]) by mails.dpdk.org (Postfix) with ESMTP id DEC9B402B7 for ; Mon, 5 Aug 2024 15:45:51 +0200 (CEST) Received: from mse-fl2.zte.com.cn (unknown [10.5.228.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4WcyPk3PBLz8XrS4 for ; Mon, 5 Aug 2024 21:45:46 +0800 (CST) Received: from szxlzmapp01.zte.com.cn ([10.5.231.85]) by mse-fl2.zte.com.cn with SMTP id 475Djh0C060565 for ; Mon, 5 Aug 2024 21:45:43 +0800 (+08) (envelope-from zhang.yong25@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Mon, 5 Aug 2024 21:45:46 +0800 X-Zmail-TransId: 3e8166b0d78a006-7e72c From: Yong Zhang To: dev@dpdk.org Cc: Yong Zhang Subject: [v1,3/5] raw/zxdh: add support for standard rawdev operations Date: Mon, 5 Aug 2024 21:34:58 +0800 Message-ID: <20240805133750.1542615-6-zhang.yong25@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240805133750.1542615-1-zhang.yong25@zte.com.cn> References: <20240805133750.1542615-1-zhang.yong25@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl2.zte.com.cn 475Djh0C060565 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 66B0D78A.001/4WcyPk3PBLz8XrS4 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for rawdev operations such as dev_start and dev_stop. Signed-off-by: Yong Zhang --- drivers/raw/zxdh/zxdh_rawdev.c | 136 ++++++++++++++++++++++++++++++++- drivers/raw/zxdh/zxdh_rawdev.h | 10 +++ 2 files changed, 145 insertions(+), 1 deletion(-) -- 2.43.0 diff --git a/drivers/raw/zxdh/zxdh_rawdev.c b/drivers/raw/zxdh/zxdh_rawdev.c index 5e42669bc7..ce83c3b626 100644 --- a/drivers/raw/zxdh/zxdh_rawdev.c +++ b/drivers/raw/zxdh/zxdh_rawdev.c @@ -111,6 +111,96 @@ zxdh_gdma_write_reg(struct rte_rawdev *dev, uint16_t queue_id, uint offset, uint *(uint *)(gdmadev->base_addr + addr) = val; } +static int +zxdh_gdma_rawdev_info_get(struct rte_rawdev *dev, + __rte_unused rte_rawdev_obj_t dev_info, + __rte_unused size_t dev_info_size) +{ + if (dev == NULL) + return -EINVAL; + + return 0; +} + +static int +zxdh_gdma_rawdev_configure(const struct rte_rawdev *dev, + rte_rawdev_obj_t config, + size_t config_size) +{ + struct zxdh_gdma_config *gdma_config = NULL; + + if ((dev == NULL) || + (config == NULL) || + (config_size != sizeof(struct zxdh_gdma_config))) + return -EINVAL; + + gdma_config = (struct zxdh_gdma_config *)config; + if (gdma_config->max_vqs > ZXDH_GDMA_TOTAL_CHAN_NUM) { + ZXDH_PMD_LOG(ERR, "gdma supports up to %d queues", ZXDH_GDMA_TOTAL_CHAN_NUM); + return -EINVAL; + } + + return 0; +} + +static int +zxdh_gdma_rawdev_start(struct rte_rawdev *dev) +{ + struct zxdh_gdma_rawdev *gdmadev = NULL; + + if (dev == NULL) + return -EINVAL; + + gdmadev = zxdh_gdma_rawdev_get_priv(dev); + gdmadev->device_state = ZXDH_GDMA_DEV_RUNNING; + + return 0; +} + +static void +zxdh_gdma_rawdev_stop(struct rte_rawdev *dev) +{ + struct zxdh_gdma_rawdev *gdmadev = NULL; + + if (dev == NULL) + return; + + gdmadev = zxdh_gdma_rawdev_get_priv(dev); + gdmadev->device_state = ZXDH_GDMA_DEV_STOPPED; +} + +static int +zxdh_gdma_rawdev_reset(struct rte_rawdev *dev) +{ + if (dev == NULL) + return -EINVAL; + + return 0; +} + +static int +zxdh_gdma_rawdev_close(struct rte_rawdev *dev) +{ + struct zxdh_gdma_rawdev *gdmadev = NULL; + struct zxdh_gdma_queue *queue = NULL; + uint16_t queue_id = 0; + + if (dev == NULL) + return -EINVAL; + + for (queue_id = 0; queue_id < ZXDH_GDMA_TOTAL_CHAN_NUM; queue_id++) { + queue = zxdh_gdma_get_queue(dev, queue_id); + if ((queue == NULL) || (queue->enable == 0)) + continue; + + zxdh_gdma_queue_free(dev, queue_id); + } + gdmadev = zxdh_gdma_rawdev_get_priv(dev); + gdmadev->device_state = ZXDH_GDMA_DEV_STOPPED; + + return 0; +} + static int zxdh_gdma_rawdev_queue_setup(struct rte_rawdev *dev, uint16_t queue_id, @@ -192,8 +282,52 @@ zxdh_gdma_rawdev_queue_setup(struct rte_rawdev *dev, return queue_id; } +static int +zxdh_gdma_rawdev_queue_release(struct rte_rawdev *dev, uint16_t queue_id) +{ + struct zxdh_gdma_queue *queue = NULL; + + if (dev == NULL) + return -EINVAL; + + queue = zxdh_gdma_get_queue(dev, queue_id); + if ((queue == NULL) || (queue->enable == 0)) + return -EINVAL; + + zxdh_gdma_queue_free(dev, queue_id); + + return 0; +} + +static int +zxdh_gdma_rawdev_get_attr(struct rte_rawdev *dev, + __rte_unused const char *attr_name, + uint64_t *attr_value) +{ + struct zxdh_gdma_rawdev *gdmadev = NULL; + struct zxdh_gdma_attr *gdma_attr = NULL; + + if ((dev == NULL) || (attr_value == NULL)) + return -EINVAL; + + gdmadev = zxdh_gdma_rawdev_get_priv(dev); + gdma_attr = (struct zxdh_gdma_attr *)attr_value; + gdma_attr->num_hw_queues = gdmadev->used_num; + + return 0; +} static const struct rte_rawdev_ops zxdh_gdma_rawdev_ops = { + .dev_info_get = zxdh_gdma_rawdev_info_get, + .dev_configure = zxdh_gdma_rawdev_configure, + .dev_start = zxdh_gdma_rawdev_start, + .dev_stop = zxdh_gdma_rawdev_stop, + .dev_close = zxdh_gdma_rawdev_close, + .dev_reset = zxdh_gdma_rawdev_reset, + .queue_setup = zxdh_gdma_rawdev_queue_setup, + .queue_release = zxdh_gdma_rawdev_queue_release, + + .attr_get = zxdh_gdma_rawdev_get_attr, }; static int @@ -256,7 +390,7 @@ zxdh_gdma_queue_init(struct rte_rawdev *dev, uint16_t queue_id) ZXDH_PMD_LOG(INFO, "queue%u ring phy addr:0x%"PRIx64" virt addr:%p", queue_id, mz->iova, mz->addr); - /* Initialize the hardware channel */ + /* Configure the hardware channel to the initial state */ zxdh_gdma_write_reg(dev, queue_id, ZXDH_GDMA_CONTROL_OFFSET, ZXDH_GDMA_CHAN_FORCE_CLOSE); zxdh_gdma_write_reg(dev, queue_id, ZXDH_GDMA_TC_CNT_OFFSET, diff --git a/drivers/raw/zxdh/zxdh_rawdev.h b/drivers/raw/zxdh/zxdh_rawdev.h index 850f1f7ec4..b4e923261d 100644 --- a/drivers/raw/zxdh/zxdh_rawdev.h +++ b/drivers/raw/zxdh/zxdh_rawdev.h @@ -102,6 +102,12 @@ struct zxdh_gdma_rawdev { struct zxdh_gdma_queue vqs[ZXDH_GDMA_TOTAL_CHAN_NUM]; }; +struct zxdh_gdma_config { + uint16_t max_hw_queues_per_core; + uint16_t max_vqs; + int fle_queue_pool_cnt; +}; + struct zxdh_gdma_rbp { uint use_ultrashort:1; uint enable:1; @@ -121,6 +127,10 @@ struct zxdh_gdma_queue_config { struct zxdh_gdma_rbp *rbp; }; +struct zxdh_gdma_attr { + uint16_t num_hw_queues; +}; + static inline struct zxdh_gdma_rawdev * zxdh_gdma_rawdev_get_priv(const struct rte_rawdev *rawdev) {