diff mbox series

[39/47] net/bnxt: tf_ulp: switch ulp to use rte crc32 hash

Message ID 20240830140049.1715230-40-sriharsha.basavapatna@broadcom.com (mailing list archive)
State Superseded
Delegated to: Ajit Khaparde
Headers
Series TruFlow update for Thor2 |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Sriharsha Basavapatna Aug. 30, 2024, 2 p.m. UTC 
From: Peter Spreadborough <peter.spreadborough@broadcom.com>

The RTE hash is highly optimized and will use HW acceleration
when available.

Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
---
 drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c  |  4 ++++
 drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c |  4 ++++
 drivers/net/bnxt/tf_ulp/ulp_gen_hash.c | 28 ++++++++++++++++++++++----
 3 files changed, 32 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
index 99a6bac0ce..c591f9327c 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tf.c
@@ -11,6 +11,7 @@ 
 #include <rte_spinlock.h>
 #include <rte_mtr.h>
 #include <rte_version.h>
+#include <rte_hash_crc.h>
 
 #include "bnxt.h"
 #include "bnxt_ulp.h"
@@ -1457,6 +1458,9 @@  ulp_tf_init(struct bnxt *bp,
 	int rc;
 	uint32_t ulp_dev_id = BNXT_ULP_DEVICE_ID_LAST;
 
+	/* Select 64bit SSE4.2 intrinsic if available */
+	rte_hash_crc_set_alg(CRC32_SSE42_x64);
+
 	/* Allocate and Initialize the ulp context. */
 	rc = ulp_tf_ctx_init(bp, session);
 	if (rc) {
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
index 765ae9f6aa..e5bb24299e 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_tfc.c
@@ -11,6 +11,7 @@ 
 #include <rte_spinlock.h>
 #include <rte_mtr.h>
 #include <rte_version.h>
+#include <rte_hash_crc.h>
 
 #include "bnxt.h"
 #include "bnxt_ulp.h"
@@ -924,6 +925,9 @@  ulp_tfc_init(struct bnxt *bp,
 	uint16_t sid;
 	int rc;
 
+	/* Select 64bit SSE4.2 intrinsic if available */
+	rte_hash_crc_set_alg(CRC32_SSE42_x64);
+
 	rc = bnxt_ulp_devid_get(bp, &ulp_dev_id);
 	if (rc) {
 		BNXT_DRV_DBG(ERR, "Unable to get device id from ulp.\n");
diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_hash.c b/drivers/net/bnxt/tf_ulp/ulp_gen_hash.c
index 17bb9c6b32..7d68bfc778 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_gen_hash.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_gen_hash.c
@@ -5,10 +5,10 @@ 
 
 #include <rte_log.h>
 #include <rte_malloc.h>
+#include <rte_hash_crc.h>
 #include "bnxt_tf_common.h"
 #include "ulp_gen_hash.h"
 #include "ulp_utils.h"
-#include "tf_hash.h"
 
 static
 int32_t ulp_bit_alloc_list_alloc(struct bit_alloc_list *blist,
@@ -203,8 +203,29 @@  ulp_gen_hash_tbl_list_key_search(struct ulp_gen_hash_tbl *hash_tbl,
 	}
 
 	/* calculate the hash */
-	hash_id = tf_hash_calc_crc32(entry->key_data,
-				     hash_tbl->key_tbl.data_size);
+	switch (hash_tbl->key_tbl.data_size) {
+	case 1:
+		hash_id = rte_hash_crc_1byte(*entry->key_data,
+					     ~0U);
+		break;
+	case 2:
+		hash_id = rte_hash_crc_2byte(*((uint16_t *)entry->key_data),
+					     ~0U);
+		break;
+	case 4:
+		hash_id = rte_hash_crc_4byte(*((uint32_t *)entry->key_data),
+					     ~0U);
+		break;
+	case 8:
+		hash_id = rte_hash_crc_8byte(*((uint64_t *)entry->key_data),
+					     ~0U);
+		break;
+	default:
+		hash_id = rte_hash_crc(entry->key_data,
+				       hash_tbl->key_tbl.data_size,
+				       ~0U);
+		break;
+	}
 	hash_id = (uint16_t)(((hash_id >> 16) & 0xffff) ^ (hash_id & 0xffff));
 	hash_id &= hash_tbl->hash_mask;
 	hash_id = hash_id * hash_tbl->hash_bkt_num;
@@ -375,4 +396,3 @@  ulp_gen_hash_tbl_list_del(struct ulp_gen_hash_tbl *hash_tbl,
 
 	return 0;
 }
-